tags:

views:

53

answers:

5

Is there a way to log the commands, make invokes to compile a program? I know of the parameters -n and -p, but they either don't resolve if-conditions but just print them out. Or they don't work, when there are calls to 'make' itself in the Makefile.

A: 

Have you tried with the -d parameter (debug)?

Note that you can control the amount of infos with --debug instead. For instance, --debug=a (same as -d), or --debug=b to show only basic infos...

Macmade
Not forgetting to redirect stdout to a file, make -d produces a lot of info very quickly.
High Performance Mark
+1  A: 

You could try to log execve calls with strace

strace -f -e execve make ...
hlovdal
That is a nice tool. Hadn't heard of it yet. But it produces a lot of output, I don't need in this case.
Customizer
Strace is a tool to trace all system calls (in my example limited to just execv), so yes it will probably give you more than the minimum you are looking for (specifically it will print all (failed) attempts to execute a command from all the $PATH directories).
hlovdal
+1  A: 

Make writes each command it executes to the console, so

make 2>&1 | tee build.log

will create a log file named build.log as a side effect which contains the same stuff written to the screen. (man tee for more details.)

2>&1 combines standard output and errors into one stream. If you didn't include that, regular output would go into the log file but errors would only go to the console. (make only writes to stderr when a command returns an error code.)

If you want to suppress output entirely in favor of logging to a file, it's even simpler:

make 2>&1 > build.log

Because these just capture console output they work just fine with recursive make.

olooney
Commands that are prefixed with @ (silent execution) are not included in this log, unfortunately.
Eric Melski
+1  A: 

You might find what you're looking for in the annotated build logs produced by SparkBuild. That includes the commands of every rule executed in the build, whether or not "@" was used to prevent make from printing the command-line.

Your comment about if-conditions is a bit confusing though: are you talking about shell constructs, or make constructs? If you mean shell constructs, I don't think there's any way for you to get exactly what you're after except by using strace as others described. If you mean make constructs, then the output you see is the result of the resolved conditional expression.

Eric Melski
They seem to be shell constructs. But I don't know, why someone wants to use shell constructs in Makefiles, when you can use the Makefile constructs. Are they better in some way?
Customizer
I SparkBuild looks interesting. I will definitely look into this.
Customizer
The question of shell constructs versus make constructs depends on what you're trying to do. For one thing, there are things you can do with shell constructs that you can't do with make constructs, like testing that a file is readable or executable. For another, they are evaluated at different times with respect to the other commands in the rule body: make constructs are evaluated before any of the commands are actually executed, but shell constructs will be evaluated in situ as the commands are executed.
Eric Melski
I see, thanks for the explanation.
Customizer
A: 

This

make SHELL="sh -x"

will cause the shell (which make invokes to evaluate shell constructs) to print information about what it's doing, letting you see how any conditionals in shell commands are being evaluated.

slowdog