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100

answers:

2

I mean,does makefile search some default directories that is not specified explicitly?

+1  A: 

By default, the only directory that make searches is the current one. You can change that with the view-path feature (if your version of make supports it - GNU Make supports it, for example - look up VPATH), or by writing more complex rules, or by using names with path components in them.

Jonathan Leffler
So yes,everything is explicit,right?I'm confused by IDE's default behavior,which hides the truth with lots of internals/defaults.So if makefile doesn't act like that,I'm determined to learn it!
Mask
yes please learn make it will `make` your life easier ... I alwasy have exactly the same problem with IDE that hide all the details
stefanB
@Mask: "Everything" is not explicit, but the paths are. The paths make cares about that is, the compiler has default paths for includes and the like. Make also has a bunch of default implicit rules.
dmckee
@Mask: Roughly speaking, if you don't tell `make` that a path is important to it, it will not consider it to be important. The way any given IDE uses `make` is typically very different from the way a human would use `make`. It will be ruthlessly thorough but horribly verbose (assuming the IDE is any good, but you wouldn't be using a bad one, would you?).
Jonathan Leffler
A: 

To answer what seems to be your question... make will only look in the current directory (although you can invoke make with the "-f" option to specify a makefile that isn't named "Makefile" or that is located in a different directory, you can also invoke make with the "-C" option to run in a different directory, and you can include one makefile --possibly located elsewhere -- from inside another makefile); however, to answer the more general question of whether everything in your makefile needs to be given explicitly...

Not everything in a Makefile needs to be given explicitly. Make has several builtin rules that allow it to build things automatically. For example, $(CXX), the C++ compiler is defined by default, and Make can build an file that ends in ".o" from a file with the same name that ends in ".cpp" automatically. So, for example:

program_NAME := myprogram
program_SRCS := $(wildcard *.cpp)
program_OBJS := ${program_SRCS:.cpp=.o}

$(program_NAME) : $(program_OBJS)
     $(CXX) $(program_OBJS) -o $(program_NAME) $(CXXFLAGS) $(LDFLAGS)

The makefile above is sufficient to build "myprogram" using all the ".cpp" files in the current directory, and note that the only explicit build step is the linking... it uses automatic build rules for compilation.

If you want to control the various flags, you can add entries to CXXFLAGS and LDFLAGS such as:

CXXFLAGS += -I./include -DHAVE_UNISTD_H -Wall -pedantic
LDFLAGS += -L./thirdparty/libs -lm -lboost

Just add the statements before the build rules. That said, I would encourage you to take a look at the CMake build system, since it is much simpler, more likely to be portable, and harder to shoot yourself in the foot. While it is possible to make very portable makefiles, it is also very easy to use platform- and even configuration-specific elements to your Makefile, which makes CMake a better choice of build system.

If you would like to know more about CMake, you might be interested in watching the CMake Google Techtalk, reading Why KDE switched to CMake, visiting the CMake wiki, and bookmarking the CMake Manual. You might also be interested in using the C++ Application Project Template and the C++ Library Project Template, both of which use CMake and provide you with an easy-to-start-with project.

If you'd like to learn more about Makefiles, you might be interested in my How-To Write a Makefile guide.

Michael Aaron Safyan
I'm using eclipse cdt,which generates lots of files,I'm confused which files are essential to the application and how each works.That's why I decide to learn makefile.
Mask
@Mask, the Eclipse cdt generates makefiles that are absolutely horrific, don't look at those. Just google a good tutorial and learn from that.
NomeN