How to create a file using Makefile

Question

Hi, I want to create a .c file from a Makefile. Content of that C file is as follows:

char *variable1 = $(VAR1_FROM_MAKEFILE);
char *variable2 = $(VAR2_FROM_MAKEFILE);

Is it possible?

Thanks in advance

Answer 1

See this question on how you can use sed in a makefile.

Answer 2

Yes, you can use shell redirection to write variables in to source file:

VAR1=foobar
all:
    @echo "char *variable1 = \"$(VAR1)\"" > generated.c

(the @ sign is here not to have the echo command displayed by make).

---

EDIT: I do not know what's your intent here, but it could be simpler to pass the Makefile variables to the compiler as macro :

VAR="toco.conf"
CFLAGS = -DVAR='$(VAR)'
all:
    gcc  $(CFLAGS) prog.c

With prog.c being :

#include <stdio.h>

int main(int ac, char **av)
{
    printf("%s\n", VAR);
    exit(0);
}