makefile: how to call macros in macros

Question

Hello,

I have the following macros in my make file:

---

pdf: // do something

clean: // just another fancy thing

---

No I want to declare a macro all: which include (or call) the macros above. The following thing doesn't work:

---

all: pdf: clean:

---

I don't want to repeat the code from pdf: and clean: in order not to rebel against DRY principle.

Thanks for your help.

Answer 1

Those are not macros, they are targets.

Makefiles take the syntax of [target]: [dependent target 1] [dependent target 2]

Try:

all: pdf clean

Answer 2

You also can run:

make clean pdf

Any way, all is commonly used as a default make target - in other words executing make without argument is same as calling make all. This maybe very confusing for expirienced users, therefore if you want "such a shortcut", call it deferently (e.g. cpdf)

Answer 3

executing make without argument is same as calling make all.

That's not correct. The first normal target in the file is the default target. There's nothing magical about all, though it is conventional to use that as the first target.