Makefile: Efficient way to make all '.c' files depend on a header file with the same name?

Question

I have a directory with 50 .c source files and each one of these .c files depends on a .h file with the same name plus a common header file.

Example:

foo.c depends on foo.h and common.h
bar.c depends on bar.h and common.h
baz.c depends on baz.h and common.h

Is it possible to setup this dependency without having to make a separate target for each .c file?

In case it matters, the ultimate output of this Makefile will be a libfoo.a library containing each of these .o files.

Edit

If at all possible I would like to do this with gnu make syntax and not have a target for each file whether or not that target was created manually or by something like makedepend.

Answer 1

As far as I know this should suffice.

%.o: %.c %.h common.h
\tgcc -c $<

\t is a tab, and the gcc -c $< is of course just an example.

Answer 2

OBJECTS = $(patsubst %.c,%.o,$(wildcard *.c))
%.o: %.c %.h common.h
    gcc -c $< -o $@

libfoo.a: $(OBJECTS)
    ar rcs $@ $^