Simple MIPS Instructions and Compilers

Question

Is it common for compilers (gcc for instance) to generate an instruction that loads some empty memory element into a register? Like... lw at,0(sp) where memory[sp + 0] = 0. This basically just places 0 into $at ($R1.) I ask because I'm looking through an executable file's hex dump (executable file is the result of the compilation of a c++ file) and I'm manually verifying it and if I start at the objdump state entry point I run into an instruction that does this. I'm not sure whether I should take this to be an error if it's just a common compiler action. It seems like a poor way to zero a register. ADDU $at,$0,$0 would be better. Or SLL $at,$0,$0..

The entry point is 400890. The jump target of the jal at the end is an empty memory location (tells me something is probably wrong...) Note that my previous example was purposefully arbitrated.

And just to be clear, -32636+gp is an empty memory location. I can post the memory contents at the point if you'd like proof :).

00400890 <__start>:
  400890:   03e00021    move    zero,ra
  400894:   04110001    bal 40089c <__start+0xc>
  400898:   00000000    nop
  40089c:   3c1c0fc0    lui gp,0xfc0
  4008a0:   279c7864    addiu   gp,gp,30820
  4008a4:   039fe021    addu    gp,gp,ra
  4008a8:   0000f821    move    ra,zero
  4008ac:   8f848034    lw  a0,-32716(gp)
  4008b0:   8fa50000    lw  a1,0(sp)
  4008b4:   27a60004    addiu   a2,sp,4
  4008b8:   2401fff8    li  at,-8
  4008bc:   03a1e824    and sp,sp,at
  4008c0:   27bdffe0    addiu   sp,sp,-32
  4008c4:   8f878054    lw  a3,-32684(gp)
  4008c8:   8f888084    lw  t0,-32636(gp)<------ this instruction
  4008cc:   00000000    nop
  4008d0:   afa80010    sw  t0,16(sp)
  4008d4:   afa20014    sw  v0,20(sp)
  4008d8:   afbd0018    sw  sp,24(sp)
  4008dc:   8f998068    lw  t9,-32664(gp)
  4008e0:   00000000    nop
  4008e4:   0320f809    jalr    t9
  4008e8:   00000000    nop

Jal target is 4010c0.

4010c0: 8f998010    lw  t9,-32752(gp)
  4010c4:   03e07821    move    t7,ra
  4010c8:   0320f809    jalr    t9

Answer 1

Perhaps it's being placed after a jump statement? If so, that statement is run before the jump occurs and could be a do nothing instruction (nop). Beyond that, it could just be the compiler on a lower optimization setting. Another possibility is that the compiler is preserving the CPU flags field. Shift and Add play with flags while a load I don't believe does.

Answer 2

This looks like CRT code. I think this code is loading some parameters passed by the OS in to $a0 and $a1 registers. Probably some larger structure is passed on the stack and code is loading that structure in to correct stack location. This code is probably not generated by C compiler but hand coded in assembly.