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48

answers:

2

Why are the general purpose registers ordered as they are? (eax, ecx, edx, ecx) For example when regarding the "inc" instruction, the opcodes are:

inc eax - 40
inc ecx - 41
inc edx - 42
inc ebx - 43

Is there a reason why they are ordered that way?

A: 

There are 8 registers, so each of them received an ordinal from 0 to 7.

I don't understand the question. Is it "why aren't they ordered in lexicographic order?" It's because the letters a, b,c,d stand for accumulator, base, counter and data and aren't just the first four letters of the alphabet.

ruslik
And why did they receive the numbers that way? You just tell why they are named as they are.
0x90
Multi-register operations such as mul and div use edx:eax so I'd have expected those to be adjacent numbers at least. IIRC in the 16-bit version you could use bx for addressing but not ax,cx,dx so that might be the reason it's at the top end with the other indexing registers.
Rup
@NOP why does it matter? you have 8 registers, so you have to assign them different numbers. that's all. Maybe it depends on some internal x86 implementation details, but it just doesn't matter.
ruslik
+3  A: 

The odd placement of (E)BX is probably due to the way that the 8086 evolved from the 8080.

The 8080 has an accumulator (A) and 6 general-purpose registers B, C, D, E, H and L, where B/C, D/E and H/L can be used together in pairs, and in particular H/L can be used as an address for memory access. The 8086 was designed so that existing 8080 code could be easily translated to it; I guess it seemed logical to map the registers in the following order:

8080 register A   -> 8086 internal register 0
              B,C ->                        1
              D,E ->                        2
              H,L ->                        3
              SP  ->                        4

As noted in another answer, AX, BX, CX and DX in the 8086 are not just arbitrary names for 4 general-purpose registers - they have mnemonic meanings for the special functions that those registers have: "accumulator", "base", "count" and "data". Given the above mapping, it makes sense to assign the "accumulator" function to internal register 0, and the "base" function to internal register 3. (And 8086 internal registers 5, 6 and 7 are BP, SI and DI, which were new functionality.)

Of course, this is really all just slightly informed (see here for example) speculation - only the 8086 designers know for sure...

Matthew Slattery