tags:

views:

70

answers:

2

Hey so I a new to C but a intermediate level programmer in general. I'm looking in to make files and having issues figuring out exactly what they are for, and how to use them. So for example I am currently compiling each of my files in my project individually by typing:

gcc -o newoutfilename1.out oldcfilename1.c
gcc -o newoutfilename2.out oldcfilename2.c

Now what if I just wanted to run a make file to compile them all at once. I don't want to put them all into one file at the end seeing how they are not linked. Also going more advance. Can a makefile be used for testing. Like after I compile to newoutfilename1.out I want to run:

./newoutfilename1.out arg1 arg2 arg3 > intothisfile.data

Generally making my life easier while coding and testing if the code compiles and out puts the correct data.

+3  A: 

There are several GNU Make tutorials on the Interwebs. Google turned up a number of hits. You might start with this one.

Kaelin Colclasure
I guess my question was kind of more along the importance of: Can you not compile all of your files to one file at the end? and Can you execute an out file in a make file?
Jacob Nelson
yes you can link the compiled objects into one executable (with ln or your compiler- usually your compiler uses ln- the linker) - see Angel's post. You cannot execute an out file if there is no 'main' defined in the file. To test you have to compile everything into one executable then test it (this is why people get angry at the vicious edit, make, run, debug cycle)
Marm0t
@Marm0t wish I could accept your comment as an answer, but accepting the answer your comment was on will have to do.
Jacob Nelson
+3  A: 

Well,

that link you gave, Kaelin, did you care to read it?

Honestly if I had not written a few 100 make files in my live I would not understand a single word in that posting you linked.

A makefile is a kind of special script.

Every line looks like this:

target: depends-on.c and.h and-even-another.h  
  command -o target depends-on.c

First line are all files, second line is a command to create the file before the ":"

So is a file. If target is older than 'depends-on.c' or 'and.h' or 'and-even-another.h' then the command in the second line is executed (assuming it will create/regenerate/output the file 'target'), usually those files are called target.o, if compiled form a source file.

In other words: one line to describe what the output is, after the colon the files the output depends upon and in the second line the command to create the output.

The thing left of the ':' is called the 'target'.

Targets can depend on other targets.

You can use wildcards.

*.o: *.c   
  cc -o "something you have to look up, dont now it from my mind ;D"

program: *.o  
  ln *.o my.lib another.lib 

The above only compiles those *.c files that are newer than the corresponding *.o files and then links all *.o files together with the two named libraries.

If you are on a linux/unix machine try "man make". Otherwise google ;D

Angelo

Angel O'Sphere
Nice tutorial! Nearly all the ones that I've found are completely unreadable to a noob, just like the linked one. Yours is pretty decent.
reemrevnivek
@Angelo: Uhm, actually, yes I *did* read that tutorial briefly before recommending it... I thought it did a very good job of summarizing the Makefile constructs I've actually found useful over the years. I'll grant that it's written in a somewhat academic style, but I would expect most readers of SO to be used to that from CS texts... :-)
Kaelin Colclasure