I'm doing some work where SIMD is required and I need to do operations on an array of doubles. Do any of the mainstream architectures support this? I've only seen floating point operations.
Thanks in Advance, Stefan
+2
A:
Yes, x86 can do it with the SSE2 instructions. A CELL too, although it's performance is pretty awful when doing double-precision computations.
jalf
2009-02-15 21:50:07
heh, how come this is the only answer that got voted up? ;)The others seem just as correct, don't they?
jalf
2009-02-15 22:46:56
I had only looked at SSE1, this was the answer I needed. Thanks so much!
Stefan Mai
2009-02-16 00:10:39
Please note that the speedup you get by using SSE2 w/ doubles is also not that great, since you can only work on two values at a time. Wait for AVX, which will bring 256 bit wide registers onto the table, possibly doubling throughput.
dietr
2010-09-05 20:15:51
+1
A:
ARM VFP can do doubles as well.
The new NEON SIMD extension (which is btw. the best SIMD instruction set that I've seen so far) can unfortunatley only deal with 32 bit floats.
Nils Pipenbrinck
2009-02-15 22:24:24
A:
CUDA running at compute capability 1.3 or grater can do it, too. The newer GTX 2xx cards can do this.
Note though that most GPUs with compute capability 1.3 have only 1 double precision FPU per core, which has to be shared by all threads, whereas you get 8 single precision FPUs, i.e. one per active thread. Big performance difference - use single precision wherever you can.
Paul R
2010-05-10 08:51:19
A:
Here's the SEE2 intrinsics supported by the C++ compiler in VS2008.
As mentioned by jalf the CELL processors double precision support for SIMD takes a significant performance hit (I believe later iterations of the chip not used in the PS3 have much improved behaviour).
In terms of main stream SSE2 came in the pentium 4 in 2001 so is widespread in the x86 industry. according to the steam hardware survey 95% of that population has SSE2 so i think it's safe to target it.
ShuggyCoUk
2009-02-15 22:47:54