This is actually a design question for firmware in an embedded system I have two ISRs (of same priority) executed independently . These ISRs are triggered when the h/w generates data. I want a mechanism which must be put in place to synchronise between task1 and task2. task 2 must know about the certain values calculated in task1 which must then be taken into account while computing certain values in task2. I don't have OS primitives to use ie the system does not have any Operating system. Task1 is executed within the context of ISR1 and task2 within the context of ISR2. The processor which we use is a STMicroelectronics 32 controller
EDIT: additional info The processor is connected to certain IPs which trigger interrupts when they are ready with data. These IPs act as type of Accumulators on input streaming frame data.