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314

answers:

3

I'm using nmake to compile multiple source files into an elf. However I do not want to specify the .o files in a long list like this:

OBJS = file1.o file2.o file3.o

What I would prefer is to use a wildcard that specifies all .o files in the current directory as dependencies for the .elf. However, the .o files don't exist until I've compiled them from the .cpp files. Is there any way to get a list of cpp files using wildcard expansion and then do a string replacement to replace the .cpp with .o.

A: 

I'm more familiar with Unix make and gmake, but you could possibly use:

OBJS = $(SOURCES:.cpp=.o)

(assuming your source files could be listed in SOURCES)

Nick Dixon
That would work, but then I'll have the same problem of specifying a list of .cpp files rather than .o files. My goal is to not have to edit the make file every time I add or remove a source file.
Massif
A: 

Here is another answer that might help you.

Another solution may be to use a wrapper batch file, where you create a list of all .cpp files with a "for" loop, like

 del listoffiles.txt
 echo SOURCES= \ >> listoffiles.txt
 for %i in (*.dll) do @echo %i \ >>listoffiles.txt
 echo. >> listoffiles.txt

Afterwards, you can try to use this with the !INCLUDE preprocessor macro in nmake:

 !INCLUDE listoffiles.txt

(I am sure this won't work from scratch, but the general idea should be clear).

Doc Brown
+1  A: 

There's not a particularly elegant way to do this in NMAKE. If you can, you should use GNU Make instead, which is available on Windows and makes many tasks much easier.

If you must use NMAKE, then you must use recursive make in order to do this automatically, because NMAKE only expands wildcards in prerequisites lists. I demonstrated how to do this in response to another similar question here.

Hope that helps.

Eric Melski