I work in a networking product that is based on message passing. Most of the code is native and lots of critical components are in assembly. So, when we do a feature we write the IPC elements and the assembly part. The assembly code (more than 20 processors) works on what is setup (in memory) by the IPC processing (2 processors) . My problem is race conditions and horrible to debug bugs. The assembly code is clean and simple but the IPC processing is the problem. Can somebody suggest some tools by which I can try to make a state machine of the necessary components and generate possible race conditions to be analyzed before we right code. Right now its all based on what all conditions one can think off. Second problem is bad programmers. I know that can't be helped but should architecture be built considering that there will be a couple of bad apples?