The fundamental issue is that the features of various processors are not particularly uniform. Look at bundling on IA64, dual instruction sets on ARM/Thumb, register windows on SPARC, the count register on PPC. Even features which may be on mutliple architectures (like predication on ARM and Itanium) may be sufficiently different that you would not share an implementation. These are all very unique features you need to understand in order to write a good compiler, they are not simply different configurations the designers chose. Given the fact that they tend to be unique to a given processor, any toggle you would have in a compiler to enable them would effectively be specific code in the compiler to support that processor, hiding it behind some config option to allow you to enable it is just an obfuscation of that.
Having said that, there are a number of common features that a lot of processors have to deal with. So you will find that most modern compilers define things like instructions encodings, register files (and aliasing), and various other tidbits in config files which they then use to generate part of the compiler source which integrates with the hand written bits.
Looking at the LLVM X86 backenda significant portion (~30%) of it are the .td (target definition) files
Phoenix:X86 louis$ ls -al | grep cpp
-rw-r--r-- 1 louis louis 27627 Nov 1 03:32 X86CodeEmitter.cpp
-rw-r--r-- 1 louis louis 661 Oct 29 18:56 X86ELFWriterInfo.cpp
-rw-r--r-- 1 louis louis 46558 Oct 29 18:56 X86FastISel.cpp
-rw-r--r-- 1 louis louis 43660 Oct 29 18:56 X86FloatingPoint.cpp
-rw-r--r-- 1 louis louis 59915 Oct 29 18:56 X86ISelDAGToDAG.cpp
-rw-r--r-- 1 louis louis 312709 Nov 1 03:32 X86ISelLowering.cpp
-rw-r--r-- 1 louis louis 109229 Oct 29 18:56 X86InstrInfo.cpp
-rw-r--r-- 1 louis louis 17396 Oct 29 18:56 X86JITInfo.cpp
-rw-r--r-- 1 louis louis 44111 Nov 1 03:32 X86RegisterInfo.cpp
-rw-r--r-- 1 louis louis 10369 Oct 29 18:56 X86Subtarget.cpp
-rw-r--r-- 1 louis louis 15265 Oct 29 18:56 X86TargetAsmInfo.cpp
-rw-r--r-- 1 louis louis 9365 Oct 29 18:56 X86TargetMachine.cpp
Phoenix:X86 louis$ ls -al | grep td
-rw-r--r-- 1 louis louis 6870 Oct 29 18:56 X86.td
-rw-r--r-- 1 louis louis 13480 Oct 29 18:56 X86CallingConv.td
-rw-r--r-- 1 louis louis 77361 Nov 1 03:32 X86Instr64bit.td
-rw-r--r-- 1 louis louis 31517 Oct 29 18:56 X86InstrFPStack.td
-rw-r--r-- 1 louis louis 11690 Oct 29 18:56 X86InstrFormats.td
-rw-r--r-- 1 louis louis 156188 Oct 29 18:56 X86InstrInfo.td
-rw-r--r-- 1 louis louis 32971 Oct 29 18:56 X86InstrMMX.td
-rw-r--r-- 1 louis louis 183502 Oct 29 18:56 X86InstrSSE.td
-rw-r--r-- 1 louis louis 23653 Nov 1 03:32 X86RegisterInfo.td