Fibonacci using SBN in OISC in Machine Language

Question

Hello,

I want to generate fibonacci series using SBN in an OISC architecture. My initial approach is to implement it in assembly language first and then convert it to machine language. The first steps involve storing 0 and 1 in 2 registers and then subtract 1 from 0 and repeatedly subtract 1 in the consequent steps. Everytime it will generate a negative number and since its negative, it branches off and fetches the absolute value finding instruction.

Is my approach correct? My confusion in the meaning of OISC. Correct me if i'm wrong, if i perform a subtraction and then an absolute value finding, it means that that i'm using 2 instructions everytime. or is it that in the OISC processor both these instructions are done at the sametime which would mean that my approach is correct.

Please help.

thank you all

Answer 1

Common assembly instructions can be synthesized from combinations of the OISC instruction. For example, taken from the Wikipedia page, addition:

ADD a, b == subleq a, Z
            subleq Z, b
            subleq Z, Z

And BEQ:

BEQ b, c == subleq b, Z, L1
            subleq Z, Z, OUT
        L1: subleq Z, Z
            subleq Z, b, c
       OUT: ...

The important insight is that once you have these building blocks, you can build more complex blocks. For instance, with ADD and BEQ you can easily implement a counting loop (which would be useful for Fibonacci...)

So you can do the following:

1. Implement Fibonacci in a normal assembly language (should take a few lines at most)
2. See what instructions you can substitute for instructions easily synthesizable from OISC instructions
3. Rewrite using OISC