views:

52

answers:

1

For exmaple:

How to represent the following x86 in SSA form:

xor  eax, eax
inc  ax

By introducing some pseudo functions, I come up with:

eax@1 = eax@0 ^ eax@0
ax@1 = LOWORD(eax@1)
al@1 = LOBYTE(ax@1)
ah@1 = HIBYTE(ax@1)
hax@1 = HIWORD(eax@1)

ax@2 = ax@1 + 1
eax@2 = MAKEDWORD(ax@2, HIWORD(eax@1))
al@2 = LOBYTE(ax@2)
ah@2 = HIBYTE(ax@2)

But I think it's too much verbose

+1  A: 

Using your notation:

  1. eax@0 = ... whatever it was before here ...
  2. eax@1 = 0
  3. ax@2 = ax@1 + 1

Because eax contains ax, there's an implicit step in between 2 and 3

  1. eax@0 = ...
  2. eax@1 = 0
  3. ax@1 = 0 (because ax cannot be non-zero if eax is zero)
  4. ax@2 = ax@1 + 1

Step 2 because any number xor'ed with itself is 0... eax@0 is dead at that point, and thus eax@1 can be renamed (using ebx as renaming so it's readable; obviously you would use a virtual register, not a real one):

  1. --- deleted, eax no longer relevant
  2. ebx@0 = 0
  3. bx@0 = 0
  4. bx@1 = bx@0 + 1

You could then note that because step 3 is a constant function, so is step 4 (adding a constant to a constant) and compress the two together (i.e. constant folding)

  1. -- deleted, eax no longer relevant
  2. ebx@0 = 0
  3. bx@0 = 1

If the upper 16 bits of ebx don't dominate anything below this, you could also delete step 2.

Yeah you right. I'm trying to avoid the verbose, but the verbose may be the feature of SSA.
forgot