Passing parameters between interrupt handlers on a Cortex-M3 ...

Question

I'm building a light kernel for a Cortex-M3.

From a high priority interrupt I'd like to invoke some code to run in a lower priority interrupt and pass some parameters along.

I don't want to use a queue to post work to the lower priority interrupt.

I just have a buffer and size to pass to it.

In the proramming manual it says that the SVC interrupt handler is synchronous which presumably means that if you invoke it from an interrupt that's a lower priority than SVC's handler it gets called immediately (the upshot of this being that you can pass parameters to it as though it were a function call (a little like the BIOS calls in MS-DOS)).

I'd like to do it the other way: passing parameters from a high priority interrupt to a lower priority one (at the moment I'm doing it by leaving the parameters in a fixed location in memory).

What's the best way to do this (if at all possible)?

Thanks,

Answer 1

I'm not familiar with the Cortex-M3 architecture, but I'm sure what you need to provide a locking mechanism on the shared memory.

The higher priority interrupt can interrupt the lower priority processing at any time (unless some how you are specifically synchronizing this with hardware and you are gaurenteed this won't happen, but this is probably not the case)

The locking mechanism maybe as simple as a one bit flag, within a critical section(disabling interrupts for the read-modify-write on the flag) to guarantee an atomic exchange on the locking flag.(i.e. the if the lower priority process/interrupt is accessing/updating the locking flag, the higher priority interrupt does come in and change it.) The flag is then the synchronization mechanism for reading and writing to the shared memory space, allowing for both processes to lock out the other while it is accessing the shared resource, without disabling interrupts for an extend time.(I guess if the shared memory access is quick enough, you could just disable interrupts while you access the share memory directly)