What is the width of a stack in an Intel IA32 architecture?

Question

Hi there,

Is the width of the stack 8 bit wide for IA32 architecture and for all types microprocessors/microcontrollers.

I am currently reading http://ozark.hendrix.edu/~burch/csbsju/cs/350/handouts/x86.html about assembly language. At the explanation of "call" it says that the stack pointer is being decreased by 4 and the program counter is push into the stack. Does this mean that the width of the stack buffer is of 8bit wide because the program counter is 32 bit long? I tried finding it in the intel IA32 architecture software development manual but can't seems to confirm it.

Thanks Sziang

Answer 1

In the IA32 architecture, memory is addressed in bytes.

Hence, in order to put another 4 bytes on the stack, you need to shift your stack pointer by 4.

Answer 2

It means that 8 bits is the smallest addressable unit of memory in the instruction set (a Byte). All memory addresses in IA32 represent a multiple of 8 bits of offset into RAM.

Answer 3

Operations that push values on "the stack" for an x86 CPU (e.g., operations involved ESP such as PUSH, CALL, etc.) all push in 4-byte increments. The effective width of the stack is 4 bytes/32 bits. If you are coding for an x64 CPU, it is 8 bytes wide, but you asked about IA32.

I have always had the stack pointer aligned on a 4 byte (DWORD) boundary. I don't know if you can DWORD-misalign the stack and have it work properly; if it does, you'll pay a serious performance penalty when accessing memory for pushes and pops (which is done very frequently in real code) because the real processor wants to read in small power-of-two size chunks.

Answer 4

This is the first time I heard about "stack width".

push/pop/call/ret have a default width (which matches the processors operating mode). But the stack per se has no width. (Alignment is a totally different story.)

From the Intel docs (for push):

"In non-64-bit modes: if the address-size and operand-size attributes are 32,
the 32-bit ESP register (stack pointer) is decremented by 4.
If both attributes are 16, the 16-bit SP register (stack pointer)
is decremented by 2."

[...]

"In 64-bit mode, the instruction’s default operation size is 64 bits.
In a push, the 64-bit RSP register (stack pointer) is decremented by 8."

For manuals (which always have the last word) check: Intel Processor Manuals