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I believe that the greatest difference is in speed and optimizations of math functions, and of course, the size of internal buses, but can you post more differences between these platforms?

+2  A: 

This is a complicated question. Different families of micros vary in their capabilities. The number of bits just refers to the width of the data pipe, which limits the precision of math, although many micros will either emulate higher order math or have special HW that can perform higher precision math functions.

The historic difference has been price: 8-bit was cheapest, 32-bit was expensive. This is still true in generally, but the price of 16-bit parts have come down significantly.

Most 8-bit processors are old and run on old architectures, so they tend to be slower. They are also made more cheaply, since that is where the competition is at the 8-bit point, and this makes them tend towards slowness. They also tend to have a low limit on supported RAM/other storage, but the actual amount depends on the family.

16-bit processors tend to focus on price as well, but there is a large range of parts available, some of which have fairly high performance and large amounts of on-chip peripherals. These parts usually perform faster than 8-bit parts on math where the precision is greater than 8 bits, and tend to have more addressable memory.

32-bit chips compete primarily on performance for an application. There is a considerable range of 32-bit parts available, each targeted at some specific application. They tend to come loaded with peripherals and compete on feature completeness. They have a large amount of addressable memory and the performance tends to be better than 16-bit parts.

Adam Shiemke
+1  A: 

The term 8/16/32 bit may be used to refer to devices with various combinations of data bus, address bus, register and instruction set widths; so by itself it is a poor taxonomy. You have to compare specific devices and their associated compilers to draw any concrete conclusions.

From a software point of view, data sizes and address range are the most obvious variations. For example in C the sizeof an int may vary and is typically 16 bit on 8 and 16 bit compilers.

Fundamentally, an 8 bit device will require a greater number of bus accesses and more instructions to perform 16 or 32bit arithmetic operations so may be slower by more than its basic clock speed for that reason.

While not related to architecture width, 16 and 8 bit devices are unlikely to incorporate an FPU or MMU, or even cache memory whereas these are more common in 32bit devices.

Clifford