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This is a really easy question, but if I have a bunch of instructions written for MIPS (although I assume this probably carries over to assembly in general), and there is a label at some point, does the instruction at that label get executed even if it's not explicitly called? For instance, let's say I have:

SUB $6, $4, $3

BNE $6, $2, LABEL1

ADDI $6, $0, -8

LABEL1: SW $6, 0x01000

If the BNE branches to LABEL1, then the ADDI gets skipped. But if BNE doesn't branch to LABEL1, then the ADDI happens, but does the next line always happen too?

A: 

"does the next line always happen too?"

yes

Javier
+1  A: 

It is called the delay slot. The branch is performed or not after the following instruction is executed. This is why it is common to see a nop after branch instructions in MIPS code. A branch instruction in the delay slot is usually undefined behavior.

The instruction at the destination label will only be executed if the condition is true and the branch is taken.

More information here

jbcreix
BTW, that article mentions architectures with two branch delay slots. Then, in your example, the code at label would be called once or twice, but usually there is a single slot.
jbcreix