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33

answers:

1

When I change a Makefile, its rules may have changed, so they should be reevaluated, but make doesn't seem to think so.

Is there any way to say, in a Makefile, that all of its targets, no matter which, depend on the Makefile itself? (Regardless of its name.)

I'm using GNU make.

+1  A: 

This looks like one more simple, useful, logical thing that Make should be able to do, but isn't.

Here is a workaround. If the clean rule is set up correctly, Make can execute it whenever the makefile has been altered, using an empty dummy file as a marker.

include dummy

dummy: Makefile
    @touch $@
    @$(MAKE) -s clean

This will work for most targets, that is targets that are actual files and that are removed by clean, and any targets that depend on them. Side-effect targets and some PHONY targets will slip through the net.

Beta
Nice trick, but if I want all my dependencies to be remade (which takes about 30 minutes in my present project) I'll call `make clean` myself.
reinierpost
That raises the related question: how to automatically generate rules for `make clean`? My present Makefile has none.
reinierpost
@reinierpost: wait a minute. Don't you want all of the dependencies to be remade, if the makefile has been altered? Don't you want them all to depend on the makefile itself? Wasn't that the whole point?
Beta
@reinierpost: As for generating a `clean` rule, it sounds as if you are solving the wrong problem. How many targets do you have?
Beta
@Beta : Yes that is pretty much the whole point, sorry. I was hoping for a solution that doesn't clean out old results before I explicitly ask for them to be remade (I often make specific targets with this Makefile) but I never specified this. I have about 300 rules, half of which are implicit.
reinierpost
@reinierpost: You want the option to continue to run binaries that are out of date? I don't think there's any clean way to do that. As for writing a `clean` rule, it really is best to do it by hand; don't worry about the implicit rules, just organize the real targets into sensible lists and use those. That way when you add a target you can just add it to a list or two, and not have to modify the `clean` rule.
Beta
@Beta: they are not binaries, but text files. (I realize make isn't suited for what I'm trying to do with it.) How do you summarize 115 implicit make rules in "a list or two"?
reinierpost
@reinierpost: Using Make for text files is unusual, but not anathema. There might be a good workaround for you problem, but the *exact* solution you want does not exist. And you misread what I wrote about lists: there might be dozens of lists, but a new target would be on only one or two of them.
Beta
@Beta: ah, OK. Well, I much prefr generic rules, that are not tied to specific filenames, so I use implicit rule patterns instead of lists. For this project I've discovered that make is basically too restricted in its expressive power and I'm tempted to write my own in an actual programming language.
reinierpost