Today when I was in computer organization class, teacher talked about something interesting to me. When it comes to talk about Why cache memory works, he said that: for (i=0; i<M; i++) for(j=0; j<N; j++) X[i][j] = X[i][j] + K; //X is double(8 bytes) it is not good to change the first line with the second. What is your opinion...
Where are variables in C++ stored? Inside the RAM or the processor's cache? ...
Can anyone suggest me some resources and lectures about computer architecture? ...
could L1/L2 cache line each cache multiple copies of the main memory data word? ...
I used to think that each memory location contains 8, 16, 32 or 64 bits. So 0101 would be stored in an 8 bit machine as 00000101 (sign extended if it was negative). This was all fine and dandy until I wrote a program in java out of curiosity to find out some more inner workings of this system. The method in question looks like this: p...
I understand what it means to access memory such that it is aligned but I don’t understand why this is necessary. For instance, why can I access a single byte from an address 0x…1 but I cannot access a half word (two bytes) from the same address. Again, I understand that if you have an address A and an object of size s that the access i...
I'm working on my HW for computer architecture and I came across the following problem: A = 247 B = 237 1) Assume A and B are signed 8-bit integers stored in two's complement format. Calculate A + B using saturating arithmetic. The result should be written in decimal. Show your work. 2) Assume A and B are signed 8 bit int...
If I understand correctly modern computers are modeled after the von Neumann architecture. I have sometimes seen reference to alternatives, but haven't really seen any very good descriptions of how non-von Neumann architectures would be organised and function. Does anyone have any examples? What are the advantages / disadvantages of a...
Whats is the exact meaning of 32 bit OS , 32 bit processor? Does it influence the size of address bus? Does it influence the number of virtual address that can be generated? How will it affect the register size means does the register size? What impact it has on virtual memory/ memory management I am a begineer in this area please po...
I started learning Assembly language from the book: Introduction to 80x86 Assembly Language and Computer Architecture This is from the Representing Data in a Computer We have looked at two schemes to represent numbers- by using binary integers (often expressed in hex) or by using ASCII codes. However, these meth...
I'm neither sure about if this is a right place to ask nor sure about how to put my query. Let me put it this way: Main Memory starting at 0x00000 to 0xFFFFF. Diskspace starting at 0x00000000 to 0xFFFFFFFF. But what we'll be able to access will not be from 0th byte till last byte right? On hardisk I guess at the 0th byte we...
Hello, Admittedly, I have a bit silly question. Basically, I am wondering if there are some special mechanisms provided by Intel processors to efficiently execute a series of dummy, i.e., NOP instructions? For instance,I could imagine there could be some kind of pre-fetch mechanism that identifies NOPS, discards them and tries to fetch ...
Could you please explain what the NX flag is and how it works (please be technical)? ...
I'm always interested in learning the inner working of things. I started with C programming and then learnt Operating systems (from stallings) and then linkers & loaders and then assembly language after reading these now I want to go into little more depth. Computer Architecture. I feel that makes everything clear. As per SO archives t...
These are "Programmer Visible" x86-64 registers: What about the invisible registers? Just now I learned that MMU registers, Interrupt Descriptor Table (IDT) uses these invisible registers. I'm learning these things in the hard way. Is there any resource (book/documentation/etc) that gives me the complete picture at once? I am aware ...
CPU Switches from User mode to Kernel Mode : What exactly does it do? How does it makes this transition? EDIT: Even if it is architecture dependent please provide me with an answer. The architecture is up to you. Tell me for the architecture you know about. I want to get an idea about what all things will be involved in it. ...
I have just started the Assembly language programming and in the first lecture our teacher told us about intel 8080 and intel 8085 and he said there was 64k memory with these processor. Now i want to know that how we find this amount of memory with specific processor, for example i have a processor 1.8 Ghz , now how i can find out the a...
Suppose the accumulater register of the processor is of 16 bit , now we can call this processor as 16 bit processor, that is this processor supports 16 bit addressing. now my question is how we can calculate the number of memory cells that can be addressed by 16 bit addressing? according to my calculation 2 to the power 16 becomes 6505...
I am having trouble understanding the difference between a 32 bit processor and 64 bit processor. I know that a 32 bit processor can access 32 bits at a time while a 64 bit processor can access 64 bits at a time. But what exactly does it mean to access a certain number of bits at one time? ...
In the following text I asked two questions and I also described that what I know about these question so that you can understand my thinking. Your precious comments about the below text are required. Below is the Detail of 1ST Question As we know that if we have one mega byte memory then we need 20 bits to address this memory. Another...