How to generate pseudo random number in FPGA?

Question

How to generate pseudo random number in FPGA?

Answer 1

This has been covered (I'd go for an LFSR): http://stackoverflow.com/questions/757151/random-number-generation-on-spartan-3e

Answer 2

If it's not for cryptography or other applications with an intelligent adversary (e.g. gambling) I'd use a linear feedback shift register approach.

It only uses exclusive or and shift, so it is very simple to implement in hardware.

Answer 3

There's an excellent Xilinx application note on generating pseudo-random number sequences efficiently in an FPGA. It's XAPP052.