Compilation error in Makefile, includes not showing up

Question

I have a makefile as follows:

CC = gcc
CFLAGS = -fmessage-length=0 -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" $(INCLUDES)
ifdef DEBUG
CFLAGS += -g3
endif

INCLUDES = \
-I../config.include \
-I../log.include \
-I../services.include

SRC_DIR = src
BIN_DIR = bin
BINARY  = report

SRCS = $(shell ls $(SRC_DIR)/*.cpp)
OBJS = $(SRCS:%.cpp=%.o)

all: $(OBJS)
    @mkdir -p $(BIN_DIR)
    $(CC) $(OBJS) -o $(BIN_DIR)/$(BINARY)

clean:
    rm -rf $(BIN_DIR) $(OBJS)

However, when I run make, I get the error:

g++     -c -o src/report.o src/report.cpp
src/report.cpp:40:20: error: log.h: No such file or directory
src/report.cpp:41:28: error: services.h: No such file or directory
src/report.cpp:41:28: error: config.h: No such file or directory

I know for a fact that the header files are there, and that they are included correctly. The paths are also correct. There is something wrong with the makefile, but I cannot figure out what.

Notice that even though I set CC = gcc, the output is always g++. This is not a typo, it is actually the output I am getting - again, not sure why.

Help!

Answer 1

You have no target for the individual object files ($(OBJS)), so Make searches its list of implicit rules, one of which is to make .o files from .cpp files using the C++ compiler, which is set by CXX (which by default is probably g++).

Answer 2

You have to redefine CXXFLAGS and CXX and not CFLAGS and CC for .cpp files.

Check the output of make -p and search for %.o: %.cpp rule.