Hi, I want to detect a condition in my makefile where a tool is the wrong version and force the make to fail with an error message indicating the item is not the right version. Can anyone give an example of doing this? I tried the following but it is not the right syntax: ifeq "$(shell svnversion --version | sed s/[^0-9\.]*://)" "1.4...
With a GNU makefile content of: SVNVERSION_NUMBER := $(shell svnversion --version | perl -lne 'print $1 if /version (\d+.\d+.\d+)/') $(error $(SVNVERSION_NUMBER)) I get a result of: Makefile:3: *** svnversion, version 1.6.2 (r37639). Stop. However, at the shell if I type: svnversion --version | perl -lne 'print $1 if /version (\...
My first question (yay!) is about gnumake and parallel builds. Here's a quick example file: .PHONY: tool_1 tool_2 tool_3 tool_4 all tools all: | tools tools: | tool_2 tool_3 tool_4 tool_1: # commands for tool 1 tool_2: | tool_1 # commands for tool 2 tool_3: | tool_1 # commands for tool 3 tool_4: | tool_1 # command...
How similar/different are gnu make, microsoft nmake and posix standard make? Obviously there's things like "which OS?", "which compiler?" and "which linker?", but I'm referring specifically to the syntax, semantics and command-line options of the makefiles themselves. If I write makefiles based on manuals for gnu make, what are the mos...
I'm trying to do this in a makefile and it fails horribly: M_ARCH := $(shell g++ -dumpmachine | awk '{split($1,a,"-");print a[1]}') do you know why? I guess it has to do with escaping, but what and where? ...
I'm trying to create a generic build template for my Makefiles, kind of like they discuss in the eval documentation. I've run into a known bug with GNU Make 3.80. When $(eval) evaluates a line that is over 193 characters, Make crashes with a "Virtual Memory Exhausted" error. The code I have that causes the issue looks like this. SRC_...
I'm trying to build an Xcode project with GNUStep-make. Right now the project is very small (3 classes) however it will grow to hundreds of classes over the coming weeks so I'm trying to get everything figured out and well-organised now. Xcode creates a ProjectName_Prefix.pch file which is a header that: a) get precompiled and b) is pr...
Hello, Could you explain me, why Makefile rule: clean: rm -f foo.{bar1,bar2,bar3} does not result in removing files: foo.bar1 foo.bar2 and foo.bar3? I believe I saw pattern like that many times in various Makefiles, but I'm currently writing my own Makefile and can't make that rule work correctly (no files are removed). I'm usin...
I would like in my GNUmakefile to have a target rule that invokes a new shell and then with the clean slate of the new shell invokes a new make. What is the syntax to do this? I tried this but it didn't work: .PHONY: setup setup: shell cd myDir; make; cd .. It gets infinite repeat of the following error: make[1]: Entering director...
I'd like to get the current directory during a GNUmake file run put into a make variable. What is the syntax to do this? Something like this? DIR := $(PWD) ...
I have a fairly large makefile that creates a number of targets on the fly by computing names from variables. (eg foo$(VAR) : $(PREREQS)). Is there any way that gnu make can be convinced to spit out a list of targets after it has expanded these variables? I'd like to be able to get the targets for an aribitrary makefile. I'm trying to...
I have a directory images/ that I want to copy to build/images/ from within a Makefile. The directory might contain multiple levels of subdirectories. What would be the most elegant way to do that? I want: avoid a full directory copy on each make run (i.e. no cp -r) guaranteed consistency (i.e. if a file changed in images/ it should be...
This is a bit complex so I have uploaded an example here. How to test it: Download the tarball and unpack it cd make_problem/make make aclean (forgot to remove the archive from the archive ;)) make alib (will re-create the simple and silly archive you just removed) ./weird.sh What weird.sh does is simply to touch a source file, re-m...
Hi Everyone, I've been heavily refactoring my makefiles, with help from Beta, Paul R, and Sjoerd (thanks guys!). Below is my STARTING product: #Nice, wonderful makefile written by Jason CC=g++ CFLAGS=-c -Wall BASE_DIR:=. SOURCE_DIR:=$(BASE_DIR)/source BUILD_DIR:=$(BASE_DIR)/build TEST_DIR:=$(BASE_DIR)/build/tests MAKEFILE_DIR:=$(BASE_D...
How create makefile doing folow - select from mysql in xml forman, transformation with xslt. ...
Consider, if you will, the following situation: $ pwd /tmp/submake_example $ head $(find -type f) ==> ./subdir/Makefile <== subtarget: echo "executing subtarget from directory $$(pwd)" ==> ./Makefile <== include subdir/Makefile $ make subtarget echo "executing subtarget from directory $(pwd)" executing subtarget from directory ...
Here's a skeleton Makefile just to make it easier to describe the problem: all_tests : unit_tests other_tests_1 other_tests_2 ... other_tests_N unit_tests : set1_summary.txt set2_summary.txt ... setN_summary.txt %_summary.txt : %_details.txt perl createSummary.pl --in $^ -out $@ %_details.txt : test_harness ./test_harness --t...
So I need to make sure that if I am cross-compiling for a specific target that a shell variable is set. If the variable is not set then make should display a message and then exit. I have the following rule in my makefile: .PHONY: checksource all: checksource default checksource: $(if $(and $(ifeq ($(CROSS_COMPILE), whatever)), ...
In a makefile, I'd like to define a variable specifying whether the current redhat-release is greater than 5.3. (This variable will be passed to gcc as a #define) So far I've come up with: # Find out which version of Red-Hat we're running RH_VER_NUM = $(shell /bin/grep -o [0-9].[0-9] /etc/redhat-release) RH_GT_5_3 = $RH_VER_NUM > '5.3'...
When I change a Makefile, its rules may have changed, so they should be reevaluated, but make doesn't seem to think so. Is there any way to say, in a Makefile, that all of its targets, no matter which, depend on the Makefile itself? (Regardless of its name.) I'm using GNU make. ...