makefile

gvim :make command does not work

Hi all, I am under a Unix environment, working in C++. I'm opening gvim from a directory in which a makefile called "Makefile" exists. When I try to use ":make" from within vim, I get: shell returned 2 (1 of 1): make: *** No targets specified and no makefile found. Stop. ...

git commit hash of an external loadable module

I'm developing a Linux kernel module outside of the Linux source tree (in the standard way) and am trying to automatically include the git commit hash of the driver into the version string printed out during the module load. The Makefile computes the git hash using the command DRV_TAG := $(shell git log -1 --pretty=format:"%h") but ...

Flat object file directory structure output with GNU Make

I have a C++ small project using GNU Make. I'd like to be able to turn the following source files: src/ a.cpp b/ b.cpp c/ c.cpp into the following output structure (I'm not concerned about duplicates at this point): build/ a.o b.o c.o So far I have the following, which unfortunately puts the .o and .d right next...

Makefile Error in Matlab Real-Time Workshop

I'm using Real-Time Workshop to auto-generate executables for VxWorks, but I am getting an error at the following command: J:\Tornado\tests\add\add_tornado_rtw>make -f add.mk GENERATE_REPORT=0 TMW_EXTMODE_TESTING=0 RTWCAPIPARAMS=0 RTWCAPISIGNALS=0 MODELLIB=addlib.lib RELATIVE_PATH_TO_ANCHOR=.. MODELREF_TARGET_TYPE=NONE add.mk:345: **...

specify directory for C++ object files and executable in Makefile

Hi I am using gcc -MM to generate prerequisites of dependencies rules for compiling source files into object files. I want to specify a directory to hold object files and executable in the value of some variable BIN_DIR=bin/release/. There are two cases: CASE 1 %.d: *.h *.cc Makefile @$(CXX) -MM $(CXXFLAGS) *.cc > $@.$$$$; \ ...

how do wild character % work in makefile rules

I have a makefile. I need to build a set of targets under C:/bin/ from the source files under src1 and src2. let them be required in the order say ${DEST_DIR}/a.o ${DEST_DIR}/b.o ${DEST_DIR}/c.o ${DEST_DIR}/d.o in some part of makefile DEST_DIR = C:/bin SRC_DIR1 = C:/src1 SRC_DIR2 = C:/src2 and i've the rules for them as follow...

Appending to variable in Makefiles for HP-UX make

I'm trying to append some text to a variable in a Makefile for HP-UX's version of make. If i use the "normal" appender, like this: CFLAGS+=some text $(CFLAGS) comes out empty. If i reference the variable, like this: CFLAGS=$(CFLAGS) some text make complains about "infinitely recursive macro." Using a temporary variable like this...

Getting the name of the makefile from the makefile

How to get the name of the makefile in the makefile? Thanks. Note: I would need that because I would like my makefile to call itself, but the makefile is not called Makefile, so I'd like to write something like this: target: ($MAKE) -f ($MAKEFILENAME) other_target ...

How to include a dynamic library in a makefile build

I am writing a program in Mac OSX 10.6 environment. In my make file, I would like to include a dynamic library /usr/lib/libsqlite3.dylib as part of my build I am not familiar with make file syntax from what I have read over the internet, I believe I have to add -lx /usr/lib/libsqlite3.dylib please advise me on whether or not this is c...

Automatic increment of build number in QT Creator

I would like to have a variable (or #define) in C++ source that will increment each time I use QT Creator to build source code. Is there any way I can do this, perhaps some QT Creator plugin or similar? If there is a way to do it if I use "make" on command line to build? ...

Convert hex to decimal in make script?

A make script is attempting to set a variable as follows: VER_DEC=$( perl -e "print hex(\"$(VER_HEX)\");" ) where VER_HEX happens to have a value of 0a. Perl seems to think that VER_HEX is zero, implying that the variable isn't set (but it is, according to a debug echo in the makefile). Does make have a simpler way to convert bases?...

What's the point of this makefile architecture?

I have a program I'm trying to compile, lets call it P. P needs a 3rd party library, L1. L1 needs another library, L2. So far, nothing is that weird. The Makefile for P basically just sets some variables, and then includes the makefile for L1. The makefile for L1 does a whole bunch of variable setting and stuff, (including a list of fi...

Computing Makefile variable on assignment

In a Makefile, I'm trying to assign the result of a shell command to a variable: TMP=`mktemp -d /tmp/.XXXXX` all: echo $(TMP) echo $(TMP) but $ make Makefile all is echoing 2 different values, eg: /tmp/.gLpm1T /tmp/.aR4cDi What is the syntax for mktemp to be computed on variable assignment? Thank you. ...

Makefile and .Mak File + CodeBlocks and VStudio

Hey guys, I am a little new to the whole makefile concept so I have some questions regarding it. I am creating a project using CodeBlocks in linux, I used a tool called cbp2mak to create a .make file out of the CodeBlocks project (if anyone knows a better tool please let me know). Now i'm not sure what the difference is between .mak an...

ifeq solaris make

Hi, I'm using the following makefile code that works on GNU/Linux: var0="abc" ifeq ($(var0),"abc") var1=alpha else var1=beta endif all: @echo $(var1) But on Solaris, it produces an error "unexpected line end" or something to that effect. How can I get the desired behavior on Solaris? ...

Is this a good way to be root in a makefile?

Is this a good way to be root in a makefile? SHELL = /bin/sh INSTDIR = /usr/bin/ OBJS = main.o file.o gen.o stat.o program1: $(OBJS) gcc -o program1 $(OBJS) main.o: main.c file.h gen.h stat.h gcc -c main.c file.o: file.c file.h gcc -c file.c gen.o: gen.c gen.h gcc -c gen.c stat.o: stat.c stat.h ...

Makefile and Files under a directory

I have Makefile under a directory and directory has many .pm ( perl files ) I want to add makefile at this directory level which does perl file syntax checking. Basically I want to add: perl -c <filename> How to get list of files automatically in that directory without hardcoding. ...

Ant: How to execute a command for each file in directory?

Hello! I want to execute a command from an Ant buildfile, for each file in a directory. I am looking for a platform-independent solution. How do I do this? Sure, I could write a script in some scripting language, but this would add further dependencies to the project. ...

Problem with makefile making .gch files instead of.o files

So, I'm making a program to test the efficiency of certain data structures. I have all the .h files and I made a very terrible makefile that probably is wrong, although it seems to work up to a point. Instead of making .o files it makes .gch files, so when it tries to acces all the .o files they are not found. This is my makefile pro...

How do I make a simple makefile? GCC Unix

Hi have three files. program.c, program.h, and headers.h program.c #includes program.h and headers.h I need to compile this on Linux using gcc compiler. I'm not sure how to do this. Netbeans created one for me, but it's empty. ...