makefile

Which version of Make to use for Java?

I have make (Windows SDK), nmake (Visual Studio) and make (CodeGear) Which version of make do I use to compile Java apps? Where do I get this "make" from? I downloaded the JDK and there is no make. I searched around for something to compile a Java makefile. What do you use, if you have a MAKEFILE and some *.java files? ...

Makefile losing access to environment variables

Hello, I've got a Makefile which has a couple of targets (all, install, uninstall). I'm trying to use the $JAVA_HOME environment variable, which works perfect in the all target, but when the install target is executed, the $JAVA_HOME variable seems to be empty (although it is not - I have checked in the terminal). Does anyone have any...

Is there a way to substitute \ with / for Gnu Make command goals?

I'm running a recursive make on windows using targets for each directory using forward slashes to separate path components. If someone runs > make foo/bar it will run fine. But if someone runs > make foo\bar it won't find the target to build: make: Nothing to be done for `foo\bar'. I would love it if I could add something like t...

In a makefile, how to get the relative path from one absolute path to another?

An example to illustrate my question: Top level makefile rootdir = $(realpath .) export includedir = $(rootdir)/include default: @$(MAKE) --directory=$(rootdir)/src/libs/libfoo Makefile for src/libfoo currentdir = $(realpath .) includedir = $(function or magic to make a relative path from $(currentdir) to $(includ...

Prepending (w/out newlines) to an auto-generated dependency list for Makefiles.

Not sure if the title makes sense... so I'll elaborate a bit. I'm toying with this makefile that uses gcc's auto-dependency list generator. At the same time, I wanted to keep a nice sorted directory structure that separates source, headers, and resources. The layout's nice and simple like so MAIN src include objects dependencies ...

Is there a better way to run a c++ makefile from a c# project?

Hi, I have a project in c# which uses bindings to use some c++ code. The c++ code consists of multiple DLL's which are compiled using a makefile. Currently I'm trying to run the makefile using a pre build event which calls nmake. However to get it to find nmake I need to have a line in it like the following: "$(DevEnvDir)..\..\VC\vcvar...

Determine all of the file dependencies in a build process that uses makefiles and ant scripts

I'm trying to understand the build process of a codebase. The project uses both autoconf (configure scripts that generate makefiles) and Maven. I would like to be able identify all of the file dependencies in the project, so that for any output file that ends up being generated by a build, I can identify how it was actually produced. Ul...

Fastest and efficient way of creating file in .NET

I've an arraylist having 30000 items in it, what's the best way of creating a text file on the fly from an ASP.NEt page? Currently I'm using the code below but it times out with large data, Using fileStr As New FileStream(sFileName, FileMode.Create, FileAccess.Write) Using writer As New StreamWriter(fileStr) writer.WriteLine("Error ...

How to check a makefile for dependencies?

I'm trying to install something with the following command: make world It takes a long time, and usually it ends up with an error saying that I'm missing some kind of package. I found out what the package is, install it, and run the thing again, only to find out after a long time that I'm missing another package. Is there a way to fin...

Comments from a makefile

When running something like "make install", there is a lot of information displayed in the terminal window. Some lines start with make[1], make[2], make[3] or make[4]. What do these mean? Does this mean there is some kind of error? ...

Makefile target depend on file from environment variable

hi, if I run make like this: make VAR=dir is there a way to add the location pointed by the VAR variable as a target dependency? actually, I need to define a file inside that directory as a dependency. I'd go with: target: $(VAR)/file.txt echo yes but if the variable was not defined, the target will understand /file.txt, which ...

Execute commands if compiling fails with Make

With GNU Make and one of the compilers in gcc: Is it possible to execute commands if (and only if) the compiling fails? ...

How do I convert a multi-file cabarc command to a corresponding makecab command?

I have the following line in a .mak file: # http://support.microsoft.com/kb/310618 kbddvp.cab: kbddvp32.dll kbddvp64.dll kbddvp.inf launcher.exe cabarc -m LZX:21 n $@ $** ... which when run, executes as: cabarc -m LZX:21 n kbddvp.cab kbddvp32.dll kbddvp64.dll kbddvp.inf launc her.exe The problem is that cabarc has b...

install rpcgen on debian lenny

Hey everybody, I am trying to compile VXI11 source codes on my debian - lenny, but I get this error: make rpcgen -M vxi11.x make: rpcgen: command not found Anyone know to rpcgen get intalled? Cant find solution. Any help is most appreciated. Thanks Petr ...

Dynamic targets in Makefiles

I'm trying to create a Makefile that has a target per src/ subfolder so that it creates a static lib. I am currently trying this: %.o: %.cpp $(CXX) $(CXXFLAGS) $(INCLUDE) -c -o $@ $< lib%.a: $(patsubst %.cpp, %.o, $(wildcard src/%/*.cpp)) $(AR) rcs $@ $^ But this doesn't work, the target matching works, but the dependency tra...

advanced grep(/perl)-like text-file processing on win32

To port a GNU makefile to the (non-cygwin) win32 platform, I am looking for a way to scan source files for the patterns such as '1234 // $RESOURCE$ "my_image.ico"', to then be appended to a resource file in the format '1234 ICON "my_image.ico"'. Using perl this is can be accomplished as such: perl -nle 'print "$1 ICON $2" if /([0-9]+)\s...

Invoking a python script from a makefile in another directory

I have a makefile that invokes a python script that lives in the same directory as the makefile. It works just fine. In makefile #1: auto: ./myscript.py Now, I have another makefile, in another directory, and wish to call the first makefile from it. In makefile #2: target: cd $(DIR); $(MAKE) auto; The problem is, when the s...

Why can I use some environment variables in some of the elements in the csproj file but not others in msbuild?

What reasons could there be for the following strange behaviour, and how might I track down the issues? We use a combination of make files and msbuild. I have a project which needs to be strongly named. I was previously setting the snk to use in the project file like this: <AssemblyOriginatorKeyFile>$(EnvironmentVariable)TheKeyName.s...

Why can I not override make's environment variables in FreeBSD's apache port?

I'm trying to configure Apache 2.2 from ports (in FreeBSD). I've written my own makefile with my desired compile options and as far as I can tell, everything seems to check out. I.e.: make -V <env_var> __MAKE_CONF=~/mk/make.apache22.conf returns what I expect except for PERL5 and USE_PERL5. I've tried setting both variables in make....

Checking if Java is installed in a makefile

I'm writing a make file that compiles and runs a Java program, but it'll be run on different platforms so I want the make file to first determine if Java IS installed, and only then will it compile and run the .java file. How would I go about doing this? ...