How to define compiler flags at compile time using CMake?

Question

add_definitions adds definition that is fixed at time when cmake (not make) is executed. How to define them when make (not cmake) is executed? The value of the definition will be an output of a custom command.

Answer 1

Here is an example of a make file:

.SUFFIXES: .c.o
CC = cc
INCLUDE = -I/usr/include -I/usr/sys/include
# Comment out one or the other, mutually exclusive
CFLAGS = -g # Debugging info
#CFLAGS = -O2 # Optimize code
LIBS = -L/usr/lib -L/usr/sys/lib -lsome_lib1 -lsome_lib2 # Debugging libs
#LIBS = -L/usr/lib # Release
FILES = mysource.o myroutines1.o myroutines2.o
APP = myapp
.c.o:
     $(CC) $(INCLUDE) $(CFLAGS) -c $<

all : $(APP)

$(APP) : $(FILES)
     $(CC) -o $@ $(FILES) $(LIBS) $(CFLAGS)

clobber : clean mrproper

clean:
     rm -rf $(FILES)

mrproper:
     rm -rf $(APP)

Notice how the flag CFLAGS is defined. Comment out the other depending if you are doing an debug or release build..

The above sample is for a make file from my tutorial for building an executable called myapp which composes of mysource.c, myroutines1.c and myroutines2.c. And it shows how make is intelligent enough to build an executable without recompiling.

Note The makefile has unix/linux orientation and is very stringent on tabs/spaces which do not show up in the example above!

Hope this helps, Best regards, Tom.

Answer 2

I'm not sure I understand the question, but...

Perhaps you could use an additional macro for providing command-line C compiler flags, e.g.:

CFLAGS=  <whatever>
CFLAGS2= #nothing  

.c.o:
    $(CC) $(INCLUDE) $(CFLAGS) $(CFLAGS2) -c $<

Then when you issue the make command, provide a "CFLAGS2=xxx" command line argument, which overrides the default setting in the makefile.

Update

Yep, I did not understand the OP's question. So kindly disregard.

Answer 3

You may find some useful tricks here: http://stackoverflow.com/questions/1438535/how-to-run-a-command-at-compile-with-in-makefile-generated-by-cmake/1468695#1468695