Why are there only four registers?

Question

Why are there only four registers in the most common CPU (x86)? Wouldn't there be a huge increase in speed if more registers were added? When will more registers be added?

Answer 1

There are more than 4 nowadays. If you look at the history of the x86 architecture, you see that it has evolved from the 8086 instruction set. Intel has always wanted to keep some degree of backwards compatibility in its processor line, so all subsequent processors simply extended the original A,B,C,D registers to wider numbers of bits. The original segment registers can be used for general purposes today, since there aren't really segments anymore (this is an oversimplification, but roughly true). The new x64 architecture provides some extra registers as well.

Answer 2

1. Registers used to be expensive to implement.
2. Not necessarily. The number of registers on a modern x86 CPU is well beyond what the CPU reveals - the CPU maintains shadow registers which are renamed as needed based upon the instruction flow.
3. In AMD64/x86_64. When running in 64bit mode, the number of general purpose registers is doubled (in addition to their size being doubled).

There are many architectures with more registers (ARM, PowerPC, etc). At times, they can achieve higher instruction throughput as less work is done in manipulating the stack, and instructions may be shorter (no need to reference stack variables). The counter-point is function calls become more expensive due to more register saving.

Answer 3

Well, there are more, the four are just special, they are 'general purpose' I think, the reasons for all this and why the rest isn't used that much is:

• x86 wasn't exactly the best instruction set to be de facto standard, Intell just saw the potential of backwards compatibility, once AMD joined in it was only a matter of time.
• It's the de facto standard now, so we have to live with it.
• Adding more registers would no longer be x86, so you mean 'creating a new instruction set based on x86 with more registers'.
• Most compilers would not use these as they can just as well compile to x86 to also target a superset of x86.
• More registers means more expensive hardware.

Answer 4

The memory that registers use is really expensive to engineer in the CPU. Aside from the design difficulties in doing so, increasing the number of available registers make CPU chips more expensive.

In addition:

• There are other methods to increase CPU performance that is more cost efficient
• Even if more where introduced, you still need to update the instruction set and have compilers modified to use.
• There is already more than 4 registers: From wikipedia (the worlds, eh, most reliable source)
  • AX/EAX/RAX: accumulator
  • BX/EBX/RBX: base index (ex: arrays)
  • CX/ECX/RCX: counter
  • DX/EDX/RDX: data/general
  • SI/ESI/RSI: "source index" for string operations.
  • DI/EDI/RDI: "destination index" for string operations.
  • SP/ESP/RSP: stack pointer for top address of the stack.
  • BP/EBP/RBP: stack base pointer for holding the address of the current stack frame.
  • IP/EIP/RIP: instruction pointer. Holds the program counter, the current instruction address.

Answer 5

Um..... (E/R)AX, (E/R)BX, (E/R)CX, (E/R)DX, (E/R)SI, (E/R)DI, (E/R)SP, (E/R)BP, (E/R)IP. I count that as more than 4. :)

Answer 6

More registers doesn't necessarily make things faster, they make the CPU architecture more complicated, as the registers have to be close to other components and many instructions work only on specific registers.

But modern CPUs have more than four registers, from top of my head there are AX, BX, CX, DX, SI, DI, BP, ... then a CPU has internalregisters, for instance for PIC (processor instruction counters)

Answer 7

The x86 has always had more than four registers. Originally, it has CS, DS, ES, SS, AX, BX, CX, DX, SI, DI, BP, IP and Flags. Of those, seven (AX, BX, CX, DX, SI, DI, and BP) supported most general math operations (addition, subtraction, etc.) BP and BX also supported use as "Base" register (i.e., to hold addresses for indirection). SI and DI can also be used as index registers, which are about the same as base registers, except that an instruction can generate an address from one base register and one index register, but NOT from two index registers or two base registers.

Since then, the registers have gotten larger, more have been added, and some of them have become more versatile, so (for example) you can now use EAX, ECX or EDX as a base register. Strangely, two segment registers (FS and GS) were added in the 386, which also allowed 32-bit segments, rendering all the segment registers nearly irrelevant.

I should also add that when you do multi-tasking, multi-threading, etc., lots of registers can have a pretty serious penalty -- since you don't know which registers are in use, when you do a context switch you have to save all the registers in one task, and load all the saved registers for the next task. In a CPU like the Itanic or the SPARC with 200+ registers, this can be rather slow. Recent SPARCs devote a fair amount of chip area to optimizing this, but their task switches are still relatively slow. It's even worse on the Itanic -- one reason it's less than impressive on typical server tasks, even though it blazes on scientific computing with (very) few task switches.

Answer 8

It simply depends on architectural descisions. Intel Itanium has 128 general purpose and 128 floating point registers, while Intel x86 only has 8 general purpose registers and a stack of 8 floats.