views:

36

answers:

2

I need a chain of file processing in my build-process. Workflow can be easily specified and built around a filename, only extension changes, like file.a -> file.b -> file.c. So, it's clearly a case for Make's declarative syntax. But as I see, for CMake this will look like an explicit *add_custom_command* for each file for each step of processing.

So, the question is if CMake supports substitutions like % from Make, so that only general rules for each step of processing would be required.

I imagine this like:

add_custom_command(OUTPUT %.b
    COMMAND convert %.a > %.b
    DEPENDS %.a)

add_custom_command(OUTPUT %.c
    COMMAND convert %.b > %.c
    DEPENDS %.b)
A: 

You could use macros.

A simple example:

MACRO( TEST )
MESSAGE ( "HELLO ${ARGV}" )
ENDMACRO( TEST )

TEST("WORLD")
Victor Marzo
Yes, I can. But it's quite the same *explicit* way. This way I need to *declare* files before using. MACRO( MY_MACRO ) ... ENDMACRO( MY_MACRO ) MY_MACRO("file1") MY_MACRO("file2") MY_MACRO("file3") add_custom_command(OUTPUT program.x COMMAND cxx -o program.x file1.cc file2.cc file3.cc DEPENDS file1.cc file2.cc file3.cc)And syntax expressiveness is worse, because macro is called with some string parameter, which defines filename without extension, while in add_custom_command we use files by their full name.
You can add file extension in macro: MACRO( CONVERT file deps ) ADD_CUSTOM_COMMAND(OUTPUT ${file}.x COMMAND cxx -o ${file}.x ${deps} DEPENDS ${deps}) ENDMACRO( CONVERT )
Victor Marzo
+1  A: 

No, CMake does not have any support for patterns. People typically use macros as a workaround.

People don't use CMake because of the elegant syntax and its expressiveness.

JesperE