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39

answers:

1

My code is simple as below.I found rmb and wmb for read and write,but found no general one.lwsync is available on PowerPC,but what is the replacement for x86?Thanks in advance.

#define barrier() __asm__ volatile ("lwsync")
...
    lock()
    if(!pInst);
    {
        T* temp=new T;
        barrier();
        pInst=temp;
    }
    unlock();
+1  A: 

rmb() and wmb() are the Linux kernel functions. There is also mb().

The x86 instructions are lfence, sfence, and mfence, IIRC.

tc.
rmb() and wmb are macros in assembly code rather than functions.I just want to see how gcc will optimize this if no barrier is set.
schemacs
If you want to be particularly paranoid, you can use `asm volatile ("whatever":::memory);` which tells GCC that arbitrary memory addresses might have been clobbered. I don't think emitting the instructions is necessarily enough if a load is cached in a register by GCC.
tc.