views:

95

answers:

3

I am using GNU Make to build a multiple-directory project. My question is how can I use single makefile to build multiple devices? e.g. My application has to run on various X,Y,Z mobile devices each having different properties like screensize, keyboard type, platform version etc. I have to pass make -f <makefilename> <targetname>. Here targetname can be device name and model like Samsung CorbyPlus, but my makefile has to go to particular dirname of samsung and open the .txt file or so where all above properties are defined. I have to read all of them during build time and access in my code through some macros/defines/flags.

Can anyone suggest how to do this? Even better solution for my requirement will be appreciated.

A: 

Because make runs under the shell, anything you can do in a shell can be done in a Makefile's target.

Delan Azabani
+1  A: 

I'd suggest using configuration makefiles. For example, suppose you have several device with its configurations:

config_device1.mk

OPTION1=yes
OPTION2=0

config_device2.mk

OPTION1=no
OPTION2=1

Then you can conditionally include them into base makefile using special parameter passed from command line (make -f makefile DEVICE=dev_type1) and use options from configuration files and process them:

makefile

ifeq ($(DEVICE),dev_type1)
include $(CONFIG_PATH)/config_device1.mk
endif

ifeq ($(DEVICE),dev_type2)
include $(CONFIG_PATH)/config_device1.mk
endif

ifeq ($(OPTION1),yes)
CFLAGS += -DBUILD_OPTION1     
endif

CFLAGS += -DBUILD_OPTION2=$(OPTION2)

BTW, for a long perspective (if you don't have time constraints now) it's better to use some of existing build system, read its manual and stick to its methodology.

Pmod
Without the `ifeq` functions, you could use a naming convention: `include $(CONFIG_PATH)/config_$(DEVICE).mk` for example.
Jonathan Leffler
Thanks. Right, it's just an example and all depends on particular build environment, architecture, conventions used in a project (which should be developed and followed by all participants)
Pmod
Can anyone tell me how can I carry the value of assigned macro/variable/flag in makefile to my code? e.g. in above snippet if I assign SCREENSIZE=17X220 and i want to take this SCREENSIZE macro value in my code, how can I?Because rest else 0/1, true/false values are generally being checked in code through #ifdef or #ifndef etc.. only.
Aahna
You can assign just as in the above example: CFLAGS+=-DSCREENSIZE=170x220, but in this case you have to parse 170x220 in your code as string. OR you can set CFLAGS+=-DSCREENHEIGHT=170 -DSCREENWIDTH=220 and then use SCREENHEIGHT and SCREENWIDTH as macros in your code directly.
Pmod
A: 

Thanks Pmod for reply. I am able to invoke proper config.mak depending on command line DEVICE value passed and trying to check property value to define corresponding macro value. ifeq ($(OPTION1),1) CFLAGS += -DOPTION1_SUPPORT endif ifeq ($(OPTION2),0) CFLAGS += -DOPTION2_SUPPORT endif

When I try accessing above OPTION1_SUPPORT value in code under #ifdef, it does neither print the statement under ifdef or under else even. I tried including some error code within above ifeq loop in my makefile, but make doesnt issue error at all. how can I solve that? OPTION1 is assigned value 1 in config.mak file. Please help.

Aahna