I'm having trouble getting a sample program to link correctly (in this case against the ICU library). When I do 'make', everything builds fine. But when I run it, it says it can't find one of the .so's. I double checked they're all installed in /usr/local/lib. What I discovered was it was looking in /usr/lib. If I symlink from there to t...
I'm trying to create a generic build template for my Makefiles, kind of like they discuss in the eval documentation. I've run into a known bug with GNU Make 3.80. When $(eval) evaluates a line that is over 193 characters, Make crashes with a "Virtual Memory Exhausted" error. The code I have that causes the issue looks like this. SRC_...
Hi, I am starting to learn about Makefiles. Looking at the output I see a lot of occurrences of: g++ -DHAVE_CONFIG_H -I ..... what is "-DHAVE_CONFIG_H" exactly? What is the function of this compilation option? Thanks ...
In my project, I want to build Windows mobile application into installation files automatically without human click on MS. How can I achieve it? Please help me! Thanks! ...
I use GNUStep to compile Objective-C on Windows 7 using GCC and MinGW. I'd like to be able to automate the "make" instruction (with make files) from Notepad++ and have any complier errors reported to Notepad++s console window. Edit: What I am trying to do is script GNUStep/Bash to login to the right directory, build the directory, then ...
How do you define dynamic variables in a makefile target? For example: all: VAR := $@ @echo $(VAR) ...
I'm using a makefile to automate some document generation. I have several documents in a directory, and one of my makefile rules will generate an index page of those files. The list of files itself is loaded on the fly using list := $(shell ls documents/*.txt) so I don't have to bother manually editing the makefile every time I add, de...
Hi, I'm playing around with make files and the VPATH variable. Basically, I'm grabbing source files from a few different places (specified by the VPATH), and compile them into the current directory using simply a list of .o-files that I want. So far so good, now I'm generating dependency information into a file called '.depend' and inc...
For example in $(CC) $(CFLAGS) -c -o $@ $< what do they mean? ...
Hi, I've been a visual studio developer for long and just trying to understand how things are in linux/unix worl. I found an open source project (Gcomandos) in source forge and tried to build it. when I download the source, I get these files: 16/02/2007 05:16 PM 25,987 aclocal.m4 16/02/2007 05:17 PM 127,445 config...
I am trying to add my first unit test to an existing Open Source project. Specifically, I added a new class, called audio_manager: src/audio/audio_manager.h src/audio/audio_manager.cc I created a src/test directory structure that mirrors the structure of the implementation files, and wrote my googletest unit tests: src/test/audio/aud...
I'm using makefiles to convert an internal file format to an XML file which is sent to other colleagues. They would make changes to the XML file and send it back to us (Don't ask, this needs to be this way ;)). I'd like to use my makefile to update the internal files when this XML changes. So I have these rules: %.internal: $(DATAFILES...
It does not appear to be possible to call Windows system commands (e.g. del, move, etc) using GNU Make. I'm trying to create a makefile that doesn't rely on the user having extra tools (e.g. rm.exe from Cygwin) installed. When the following rule is run, an error is reported del: command not found: clean: del *.o This is presumably...
I have a setup where make is going through a bunch of subdirectories and making inside those directories. I would like it to stop the build on a failure immediately. The code snippet below illustrates this. Can someone point me in the right direction on how the makefile should be set up or some documentation about building from a top ...
I have several hundred files in a non-flat directory structure. My Makefile lists each sourcefile, which, given the size of the project and the fact that there are multiple developers on the project, can create annoyances when we forget to put a new one in or take out the old ones. I'd like to generalize my Makefile so that make can simp...
(This was asked before but the answers were not conclusive) While I love development using Xcode (3.2.1), I have the need to port some projects to other UNIX systems, and even Windows. The code is all C++ but fairly complex. I'm looking for a way to automated / semi-automated generation of equivalent Makefiles out of my Xcode projects, a...
It's easy to let program figure out the dependency at compile time, (with gcc -MM). Nevertheless, link dependency (deciding which libraries should be linked to) seems to be difficult to figure out. This issue become emergent when multiple targets with individual libraries to link to are needed. For instance, three dynamic library target...
Hi everyone, For a project, we are required to use a makefile to pull everything together, but our abhorrent professor never showed us how to. I only have ONE file, a3driver.cpp. The driver imports a class from a location "/user/cse232/Examples/example32.sequence.cpp". That's it, everything else is contained with the .cpp. How would ...
I have a makefile with something like the following targets: install: do a whole bunch of stuff to install dist: install cp README.txt $(INSTALL_DIR) zip $(INSTALL_DIR) I am trying to not repeat the commands from target install and make dist execute install first before executing its own commands. Calling make dist does...
Hello, I'm writing a makefile and I can't figure out how to include all my source files without having to write all source file I want to use. Here is the makefile I'm currently using: GCC = $(GNUARM_HOME)\bin\arm-elf-gcc.exe SOURCES=ShapeApp.cpp Square.cpp Circle.cpp Shape.cpp OBJECTS=$(SOURCES:.cpp=.o) EXECUTABLE=hello all: $(EXECUT...