Does anyone know how to enable ARM FIQ?

Question

Does anyone know how to enable ARM FIQ?

Answer 1

Other than enabling or disabling the IRQ/FIQ while you're in supervisor mode, there's no special setup you should have to do on the ARM to use it, unless the system (that the ARM chip is running in) has disabled it in hardware (based on your comment, this is not the case since you're seeing the FIQ input pin driven correctly).

For those unaware of the acronyms, FIQ is simply the last interrupt vector in the list which means it's not limited to a branch instruction as the other interrupts are. That means it can execute faster than the other IRQ handlers.

Normal IRQs are limited to a branch instruction since they have to ensure their code fits into a single word. FIQ, because it won't overwrite any other IRQ vectors, can just run the code directly without a branch instruction (hence the "fast").

The FIQ input line is just a way for external elements to kick the ARM chip into FIQ mode and start executing the correct exception. There's nothing on the ARM itself which prevents that from happening except the CPSR.

To enable FIQ in supervisor mode:

MRS r1, cpsr         ; get the cpsr.
BIC r1, r1, #0x40    ; enable FIQ (ORR to disable).
MSR cpsr_c, r1       ; copy it back, control field bit update.

A similar thing can be done for normal IRQs, but using #0x80 instead of #0x40.