How can Make run its inside parts by calling new make?

Question

Initially, when I made the question I attributed the problem to wildcards, a problem, but a bigger problem apparently looming. If I understand the error right, GNU make has no make-subprocessing so have to switch to some derivative of Boor's make. I may be understanding it wrong but I try to make this problem easier to understand.

Makefile: makefile trying to execute parts of itself many times, the thing I mean by subprocessing

all:
        make clean
        make $$(.??*)
#I want to replace below-like-things with a wildcard above
#       make .lambda
#       make .lambda_t
#
# KEY: It should run NEW make-processes! how?
clean:
        -rm .??*
.lambda:
#do something
.lambda_t:

Answer 1

You are doing it the wrong way.
You don't need to call make like that. Just declares additional targets, and use target dependancies.
Note that you can use the Make 'foreach dir' function to get files matching a pattern:

_FILES_HIDDEN = $(foreach dir,./,$(wildcard .*))