makefile

makefile .o help... permission denied

I have the following makefile for my program. It creates program.o file, but when I try running it ./program.o I get the following error: ./statsh.o: Permission denied. Any ideas why this might be happening? HEADERS = statsh.h functions.h default: statsh statsh.o: statsh.c $(HEADERS) gcc -c statsh.c -o statsh.o statsh: stat...

Third party libraries in CMake

I am using cmake for my project, but I have another library in a subdirectory ( say lib/ ) which uses a plain Makefile. How do I instruct CMake to run the Makefile in lib as part of the build process? ...

How to write loop in makefile?

I want to execute these commands ./a.out 1 ./a.out 2 ./a.out 3 ./a.out 4 . . .so on How to write this thing as a loop in make file? ...

make: hierarchical make file

(disclaimer: I am used to scons ... I am somewhat unexperienced with make) Context: I am using Eclipse CDT which generates makefiles. Let's say I have a project directory 'lib' and 2 build configurations 'Debug' and 'Release'. Eclipse CDT gracefully generates a makefile for each build configuration. The said makefiles end-up residing ...

Gnu Makefile - Handling dependencies

What approach do C++ programmers on Unix platform use to create and manage Makefiles? I was using hand made Makefiles for my projects but they don't handle header file changes and other dependencies. I googled around and found a good solution here. But I ran into a problem here in the sed command - sed -e 's/#.*//' -e 's/^[^:]*: ...

Updating crontab from a makefile

Hi there! I'm trying to update the crontab from a GNU Make file. The idea is like this: I look through the existing cron table and filter out all entries marked as mine (via the comment) and save that to a temporary file. Then I add my jobs to that temporary file and make it a new cron table. That way the make file can be run several ti...

Is there a way to exclude certain source files or folders from a makefile?

Is there a way to exclude some files from the compilation process? Or even whole directories? I believe the makefile is using find to find all the source files inside the src directory. Is there a way to specify the directories to ignore from find? Like some switch, or something? ...

autoconf / configure takes long time in cygwin

is there a way to speed up the configure script when compiling using the gnu toolchain on cygwin? reconfiguring with only minor changes takes equally long, is there a way to cache the configuration ? ...

Joining elements of a list in GNU Make

Hello there! In my makefile I have a variable with a list of directories, like this: DIRS = /usr /usr/share/ /lib Now, I need to create PATH variable from it, which is basically the same, but uses semicolon as a separator: PATH = /usr:/usr/share/:/lib How do I do that? I mean, how do I join elements of DIRS list with semicolons, i...

Distributed GNU Make for Win32

Is there a version of GNU Make, or GNU Make compatible application, which supports distributed builds on Win32? We currently have a large project using gnu makefiles. We use the Win32 version of GMake to build. Our build environment supports parallel builds without a problem, and we'd like to try and perform a distributed build if pos...

How to handle setting up environment in makefile?

So, to compile my executable, I need to have the library locations set up correctly. The problem is, the setup comes from a bunch of scripts that do the env variable exporting, and what needs to be set up may change (beyond my control) so I need to use those scripts instead of copying their functionality. To compile in regular command li...

in m4's patsubst, how do I replace newlines with spaces?

How can I tell m4's patsubstr to replace all newlines in a string with a space? I've tried: patsubst(MULTI_LINE_STR_DEFINE,`\n',` ') and patsubst(MULTI_LINE_STR_DEFINE,`\\n',` ') ...

In a makefile, how do I execute a command on each file name in variable?

I know I am doing it wrong, but I can't figure out how to organize this makefile. I define my util source files, and use some functions to define the .o files from them here: UTIL_SRC = utils/src/foo.cpp utils/src/bar.cpp utils/src/baz.cpp UTIL_OBJS = $(patsubst utils/src/%.cpp,utils/obj/%.o,$(UTIL_SRC)) This is the target that I use...

Organizing School Workspace/Writing Makefile

I am doing some C programming for school and I have found myself reusing libraries that I have created, over and over again (stacks, user input, error handling, etc). Right now, my personal SVN directory structure looks like this: trunk/ |-- 2520 | `-- assignments | |-- A2 | |-- Makefile | |-- README | ...

How can I get the "full" makefile if a Makefile contains "include"?

Is it possible to get the "full" makefile if makefile contains "include"? For example: #here is the contents of Makefile include inc1.i include inc2.i clean: rm -rf * #here is the contents of inc1.i abc: touch abc #here is the contents of inc2.i def: touch def How can I get a "full" Makefil...

Run make with Makefile in memory

Suppose I have a encrypted Makefile on hand, I want to write a Perl program to decrypt it and run make -f with it. Is this possible without writting the decrypted Makefile back to harddisk? ...

How to write a Makefile rule to download a file only if it is missing?

I'm trying to write a Makefile which should download some sources if and only if they are missing. Something like: hello: hello.c gcc -o hello hello.c hello.c: wget -O hello.c http://example.org/hello.c But of course this causes hello.c to be downloaded every time make command is run. I would like hello.c to be downloaded by...

cannot get makefile to work with Qt library

I have 3 files in my program: App_interface.h, App_interface.cpp, main.cpp. Im trying to compile my program which requires the Qt library. I just installed the Qt library in the default location. This is my makefile: if your wondering why i don't use moc in this makefile is because 1) i dont know how to do that. 2) i just want to stop g...

Makefile variables from command line vs. environment

Is there a way to detect whether a variable has been set from the environment vs. on the command line? I would like to distinguish between someone invoking make with make LIB=mylib vs. make and $LIB being defined. ...

In gnu make, can the prerequisites in a static pattern rule have have different suffixes.

Our make file compiles .c source files with a static pattern rule like this: OBJECTS = foo.o bar.o baz.o $(OBJECTS): %.o: %.c $(CC) $< $(C_OPTIONS) -c -o $@ I need to change one of the .c files to an Objective-C .m file. Invoking the compiler is the same for both source types, so I'd like to use the same rule and just tweak it to...