tags:

views:

268

answers:

4

I use MakeFiles.

I have a target called "run" which runs the build target. Simplified, it looks like:

prog: ....
  ...

run: ./prog
  ./prog

Sit back down. I know this is ingenious, but no need for an standing ovation.

Now, question is -- is there anyway to pass arguments? So hat

make run asdf --> ./prog asdf
make run the dog kicked the cat --> ./prog the dog kicked the cat

Thanks!

A: 

for standard make you can pass arguments by defining macros like this

make run arg1=asdf

then use them like this

run: ./prog $(arg1)
   etc

References for make Microsoft's NMake

John Knoeller
+4  A: 

I don't know a way to do what you want exactly, but a workaround might be:

run: ./prog
    ./prog ${ARGS}

Then:

make ARGS="asdf" run
calmh
+1 for using the correct brackets for make macros! (-: Round brackets should be used for object substitution in archive files. Though this distinction is becoming less and less as shared lib's become more prevalent.
Rob Wells
@Rob: $() is more portable, it works in Nmake as well as make.
John Knoeller
I believe this is as close to an answer as I'll get. Answer accepted.
anon
@John, it may be more portable with newer implementations of make but it is sometimes not backwards compatible. Surely even MS didn't break existing syntax.
Rob Wells
@Rob: Nmake has never supported ${} for macro expansion, and it appears to be an archaic form now in make. $() is recommended by every online tutorial I've looked at. $() is also more consistent with other tools such as bash.
John Knoeller
Maybe it is archaic. I've always used ${}, but the manual for GNU Make states "To substitute a variable's value, write a dollar sign followed by the name of the variable in parentheses or braces: either `$(foo)' or `${foo}' is a valid reference to the variable `foo'." and proceeds to give examples where only $() is used. Ah well.
calmh
cheers John and calmh, I went back and saw that the suggestion came from my copy of the first edition OReilly book "Managing Projects with Make". The author states the rule about archive substitution using ()'s and macros able to do both but suggests using {}'s to distinguish.But....The new edition now retitled as "Managing Projects with GNU Make" uses ()'s throughout.Go figure.... Guess I'll have to modernise! (-:I'm still amazed that MS NMake barfs at {}'s though.
Rob Wells
+2  A: 

No. Looking at the syntax from the man page for GNU make

make [ -f makefile ] [ options ] ... [ targets ] ...

you can specify multiple targets, hence 'no' (at least no in the exact way you specified).

Maxwell Troy Milton King
A: 

anon, run: ./prog looks a bit strange, as right part should be a target, so run: prog looks better.

I would suggest simply:

.PHONY: run

run:
        prog $(arg1)

and I would like to add, that arguments can be passed:

  1. as argument: make arg1="asdf" run
  2. or be defined as environment: arg1="asdf" make run
dma_k