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+3  Q: 

Intel Assembler optimization

I'm currently trying to optimize the code emitted from a home-made compiler, for a home-made language.

I've tried out Intel VTune to see where the bottlenecks are: http://www.imada.sdu.dk/~sorenh07/misc/vtune-assembly-optimization.png

I find it very impressive that a "subl"-instruction is responsible for over 38% of the clockticks in a program running for 30-90 seconds! Can anybody give an explanation why?

The "optimization report" feature in VTune apparently doesn't exist for programs not compiled with icc. Does there exist a program which suggests optimization for assembler code? (that is, not code coming from a high-level language).

+2  A: 

My guess is that it's the idivl instruction that's actually taking up the 38%...division taking longer makes a bit more sense than subtraction no?

foxwoods  2010-05-01 15:07:06
Sure, subl must wait on idivl execution...
GJ  2010-05-01 18:46:22

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