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views:

34

answers:

3

Hi,

I'm wondering how I can avoid some echo in a Makefile :

clean: rm -fr *.o

this rule will print :

$>make clean
rm -fr *.o

$>

How can I avoid that? thx!

+1  A: 

I think you put an @ in front of the command. Try changing rm to @rm.

SCFrench
+3  A: 

To start with: the actual command must be on the next line (or at least that is the case with GNU Make, it might be different with other Make's - I'm not sure of that)

clean:
    rm -rf *.o

(note, you need a before rm -rf *.o)

Making it silent can be done by prefixing a @:

so your makefile becomes

clean:
    @rm -rf *.o

If there are no *.o files to delete, you might still end up with an error message. To suppress these, add the following

clean:
    -@rm -rf *.o 2>/dev/null || true
  • 2>/dev/null pipes any error message to /dev/null - so you won't see any errors
  • the - in front of the command makes sure that Make ignores a non-zero return code
plof
That is the classic way of dealing it wish bash, but I was looking for the GNU Make way of solving this problem.And of course I had the command on the next line, just wrote the question in a hurry.BTW, what do you think of the .SILENT answer (which a friend of mine found) ?
claferri
I haven't really used .silent, the GNU Make manual states that it is only supported for historical reasons, but I do like it. It's less verbose than many `@` in your commands.
plof
Come to think of it, the `-` and the `|| true` together are too much - either one of them should suffice. You need one of them to prevent Gnu Make from quitting if there is nothing to delete. Better would have been to use `rm -f *.o`, since that doesn't return an error if there is nothing to delete.
plof
+2  A: 

In fact I was looking for something else, adding this line to the Makefile :

.SILENT:clean

while execute every step of the "clean" target silently.

Until someone point some drawback to this, I use this as my favourite solution!

claferri