Hi,
I'm wondering how I can avoid some echo in a Makefile :
clean: rm -fr *.o
this rule will print :
$>make clean
rm -fr *.o$>
How can I avoid that? thx!
Hi,
I'm wondering how I can avoid some echo in a Makefile :
clean: rm -fr *.o
this rule will print :
$>make clean
rm -fr *.o$>
How can I avoid that? thx!
I think you put an @ in front of the command. Try changing rm to @rm.
To start with: the actual command must be on the next line (or at least that is the case with GNU Make, it might be different with other Make's - I'm not sure of that)
clean:
rm -rf *.o
(note, you need a before rm -rf *.o)
Making it silent can be done by prefixing a @:
so your makefile becomes
clean:
@rm -rf *.o
If there are no *.o files to delete, you might still end up with an error message. To suppress these, add the following
clean:
-@rm -rf *.o 2>/dev/null || true
2>/dev/null
pipes any error message to /dev/null - so you won't see any errors-
in front of the command makes sure that Make ignores a non-zero return codeIn fact I was looking for something else, adding this line to the Makefile :
.SILENT:clean
while execute every step of the "clean" target silently.
Until someone point some drawback to this, I use this as my favourite solution!