As many here have already said Xilinx are FPGAs. FPGAs are "softlogic" in that you use a simalar development process to developing an ASIC, but you can test your design on hardware without requiring a fabrication plant to do so. The trade off is speed, they implement "meta-logic" instead layout a design composed of traditional "nand-nand" or "nor-nor" logic, they have programmable look up tables which can be programmed to implement arbitrary logic gates. This is simalar in concept to running an interpretor for a processor instead of native code.
While you can't achieve the same performance as you can with an asic, it allows low volume products to have most of the advantages of an asic with out the cost of a production run on at FAB facility. In addition you can treat an FPGA much more like a software design, and load different bitstreams for different modes of operation. Both Xilinx and Altera have dev kits that let you store your design on a compact flash and select different images at boot time.
For embedded designs FPGA allow you something that you typically can't get out of an off the shelf processor, your design can have the EXACT hardware you need, you don't have to look threw 1000 different micros to find the "perfect match!" On top of that I've seen old systems that used either 16bit or 32bit processors moved to FPGA and acheived better performance, lower cost, and lower power than the processor based designs. There is something to be said for including "the right" hardware.
Both VHDL and Verilog are high level langauges and while different from C and C++ they aren't significantly harder just different and require a different thought process. You don't get a lot of built in libraries to do everything for you, so you might wind up getting "Cores" off sites like "OpenCores.com" and connecting them together to implement your designs, with the additional logic you need. FPGA code is going to generally be parrallel, you have to specifically implement serial behaviours, and you have to take into considerations pipeline stages and delays. So while the languages themself aren't more difficult, some of the concepts maybe. But they are also more rewarding, kinda like building a house instead of writing about a house.