Why is XST optimizing away my registers and how do I stop it?

Question

I have a simple verilog program that increments a 32 bit counter, converts the number to an ASCII string using $sformat and then pushes the string to the host machine 1 byte at a time using an FTDI FT245RL.

Unfortunately Xilinx XST keeps optimizing away the string register vector. I've tried mucking around with various initialization and access routines with no success. I can't seem to turn off optimization, and all of the examples I find online differ very little from my initialization routines. What am I doing wrong?

module counter(CK12, TXE_, WR, RD_, LED, USBD);

   input CK12;
   input TXE_;
   output WR;
   output RD_;
   output [7:0] LED;
   inout [7:0] USBD;

   reg [31:0] count = 0;

   reg [7:0] k;
   reg wrf  = 0;
   reg rd   = 1;
   reg [7:0] lbyte = 8'b00000000;   

   reg td        = 1;
   parameter MEM_SIZE  = 88;
   parameter STR_SIZE  = 11;
   reg [MEM_SIZE - 1:0] str;
   reg [7:0] strpos = 8'b00000000;

   initial
     begin
     for (k = 0; k < MEM_SIZE; k = k + 1)
       begin
       str[k]    = 0;
       end
     end

   always @(posedge CK12)
     begin
     if (TXE_ == 0 && wrf == 1)
       begin
       count    = count + 1;
       wrf       = 0;
       end


     else if (wrf == 0)  // If we've already lowered the strobe, latch the data
       begin
       if(td)
         begin
         $sformat(str, "%0000000000d\n", count);
         strpos = 0;
         td   = 0;
         end

       str      = str << 8;
       wrf    = 1;
       strpos   = strpos + 1;   

       if(strpos == STR_SIZE)
         td    = 1;

       end  
     end

   assign RD_       = rd;
   assign WR        = wrf;
   assign USBD         = str[87:80];
   assign LED       = count[31:24];

endmodule

Loading device for application Rf_Device from file '3s100e.nph' in environment /opt/Xilinx/10.1/ISE. WARNING:Xst:1293 - FF/Latch str_0 has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.

WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch str_1 has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.

WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch str_2 has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.

Answer 1

The $sformat task is unlikely to be synthesisable - consider what hardware the compiler would need to produce to implement this function! This means your 'str' register never gets updated, so the compiler thinks it can optimize it away. Consider a BCD counter, and maybe a lookup table to convert the BCD codes to ASCII codes.

AFAIK 'initial' blocks are not synthesisable. To initialize flops, use a reset signal. Memories need a 'for' loop like you have, but which triggers only after reset.