Hi, I'm trying to develop a program that uses another internal library done in the same project. I want to link both. The lib is stored and succesfully compiled under ./lib/mylib and a mylib.a is created. The issue is that I need to include ./lib/mylib directory in the INCLUDE search and also link the program against the library. Are ...
I have a makefile containing rules to build the system, tests, and run them. The last item is executed by just calling a shell script. Among other things, this prevents me from running the tests in parallel. I have the following variables: TEST_SRC=$(wildcard tests/*.c) TESTS=$(patsubst %.c,%,${TEST_SRC}) and it builds the tests with...
Hopefully this is a very simple question. I have a makefile pattern rule that looks like this: %.so : %.f %.pyf f2py -c -L${LAPACK_DIR} ${GRASPLIBS} -m $* $^ ${SOURCES} --opt='-02' --f77flags='-fcray-pointer' >> silent.txt I want the makefile to build a number of .so files, so I tried to get it to build two files (radgrd_py.so and...
Hi, given this simple install target for my Makefile: install: zrm $(CONF) install -D -m 0755 -o mysql -g mysql conf/lvm0.conf $(DESTDIR)/$(CONFDIR)/lvm0/mysql-zrm.conf install -D -m 0755 -o mysql -g mysql conf/inc1.conf $(DESTDIR)/$(CONFDIR)/inc1/mysql-zrm.conf install -D -m 0755 -o mysql -g mysql conf/dump0.co...
Hi, Here is my makefile http://pastie.org/1104332. I am trying to compile different .c files and .s files (assembly files) from different sub directories into E:/em35x/build/mfg-sample-app-cortexm3-iar-em357-em3xx-dev0680/ then the linker should link all the .o files from the build directory (E:/em35x/build/mfg-sample-app-cortexm3-iar-e...
I'm a .net developer by heart and usually write web applications. However I've been given the binary of a small project and I need to compile it (I think). It is only two files: mfile.h and mfile.cpp. From looking at the code the .h file is a header file that contains constants and the cpp file is the actual codefile. I created a ne...
Hope everyone is doing well I am having a problem with make files in erlang on windows. I can't seem to get the following code to work. .SUFFIXES: .erl .beam .erl.beam: erlc -W $< ERL = erl -boot start_clean MODS = main send get loops all: compile ${ERL} -pa 'G:\Documents and Settings\Administrador' -s main start co...
I am searching a make like build tool that supports (besides usual make features): Automatic deletion of temporary created files (like in GNU make for example) Regular expressions in rule patterns (like e.g. in Cook About 1: By default GNU make deletes temporary files. For example have these rules: %.c: %.y some-comand %....
hi, I have a list of RPM file names (like "package-1.0") that will be the dependencies of a make target, but some of them have the architecture x86_64 and others have i386. what do I do to match them? I need something like: target: $(addsuffix .[i386|x86_64].rpm,$(shell cat packages_file)) but that won't work. I could use: target: $...
I have a Visual Studio project which uses nmake to call a Python file for clean, build, or rebuild. For ex. in VS project properties->Configuration Properties->NMake, for the Build Command Line I would have ....\blah\tools\myBuildFile.py build -arg1 -arg2 There are several python files used with lots of variables and routines so I wou...
I am moving a C++ project from Windows to Linux and I now need to create a build/make file. I have never created a build/make file before. I also need to include Boost libraries to make it more complicated. It must also be a makefile and I need to learn how to create makefile anyway, so CMake and SCON are out. IDEs are also out because o...
Does anyone know of a tool that generates a makefile by scanning a directory for source files? It may be naive: no need to detect external dependencies use default compiler/linker settings ...
I'm writing a C project in Eclipse and while trying to run it I get the following error message: (Cannot run program "make": Launching failed) My Makefile is: all : GenericHashTable.o TableErrorHandle.o gcc -Wall GenericHashTable.o TableErrorHandle.o -o all GenericHashTable.o : GenericHashTable.c GenericHashTable.h TableError...
It is hard to believe, but it seems to me that the common Makefile idiom "> $@" is wrong. In particular, a target whose rule has a command that fails but uses this redirection will fail the first time around but not subsequent times. This is because even though the command fails, the redirection "succeeds" in the sense of creating an u...
I would like to know if there is good practices, good tools to move a bunch of windows makefile projects to some msbuid (VS 2010) format? If you think that' not a good idea to make it using a tool, maybe you do know something like a dependency analyser to make a checklist? ...
Hi everyone, After some time using make to build C++ programs I still don't have a very good knowledge about Makefiles. I am thinking about asking for a "good" example and use it from now on. I have been searching, but the ones I found is too complicated for me to understand. Please give me a template, with comments explaining how it wo...
Hi all, i should compile a program written in C through a Makefile. I should insert into the Makefile, some option, for instance: -O2, -march=i686. How can I insert this option in the Makefile without write into it? ...
Since i am not so experienced with the building process / makefiles on linux i ran in follow problem: the Setup: i have an makefile A, which needs some enviroment variables set before running, this is done by running . ./set_A_vars.sh (set_A_vars.sh contains many export lines) before running make -f A now i need to make project A withi...
We have a fairly large code-base. The vast majority of the code is compiled using qmake to produce the makefiles. However, there are some sub-projects that get produced by running batch files or running other programs. I'd like to be able to have everything compiled using qmake, but I can't figure out how to get qmake to simply run a ...
If I have a rule like this in my make file: CC = g++ CFLAGS = -Wall COMPILE = $(CC) $(CFLAGS) -c src = A.cpp \ main.cpp test_src = Test.cpp test = testAll OBJFILES := $(patsubst %.cpp,%.o,$(src)) TEST_OBJS := $(patsubst %.cpp,%.o,$(test_src)) %.o: %.cpp $(COMPILE) -I UnitTest++/src -LUnitTest++/ -l UnitTest++ -o $@ $< ...