x86

How to completely suspend the processor?

I'm writing a small bootloader for an x86 based PC. The problem is that the CPU is somehow still active after executing these instructions: sti hlt sti is supposed to disable interrupts for the next instruction hlt is supposed to completely halt the processor Since they're used together, I assumed they would just 'freeze' the compute...

INT 3 (0xCC) - x86 ASM

I've read that the INT 3 (0xCC) is used for software breakpoints. It is set by (for instance) a debugger by overwriting the actual program code in memory. I've also read that INT 3 is a "trap" not "fault" exception meaning the address pushed on the stack is the address of the instruction following the INT3 instruction. How does the debug...

SP (Stack Pointer) Anti-debug Trick - x86

Listing 7.1 The Decryptor of the Cascade Virus lea si, Start ; position to decrypt (dynamically set) mov sp, 0682 ; length of encrypted body (1666 bytes) Decrypt: xor [si],si ; decryption key/counter 1 xor [si],sp ; decryption key/counter 2 inc si ; increment one counter dec sp ; decrement the other jnz De...

Is it possible to detect if the hardware display has completed the process of switching between display modes?

The reason I ask is because I just bought a new LCD that takes approximately 5 seconds to change between display modes, such as from 1920x1080x32bpp to 1280x800x32bpp. Does a programmatic solution exist to detect if the display is ready for video output? ...

What are some tips for optimizing the assembly code generated by a compiler?

I am currently in the process of writing a compiler and I seem to have run into some problems getting it to output code that executes in a decent timeframe. A brief overview of the compiler: 7Basic is a compiler that aims to compile 7Basic code directly into machine code for the target architecture / platform. Currently 7Basic gener...

Speed difference between global and object variable

Is it faster to access a global or object variable? In C++, I'm referring to the difference between ::foo and this->foo In x86 assembler, this basically translates to mov eax, offset foo vs mov eax, dword ptr[edx+foo] All data in both cases is expected to be in cache. (I know the difference if any will be tiny, and one shou...

Capturing logcat on android x86

iam running android 2.2 (froyo) on a x-86 based PC. How can I capture a logcat on the terminal console and save it to any specific location within the android, say notepad ? Whats is the keyboard command for it ? What are the other generic keyboard shortcuts for android x-86? ...

Loading x86 or x64 assembly

I have two versions of System.Data.SQLite.DLL - for x86 and x64 platform. The x86 version keeps in application folder and x64 version keeps in appFolder\x64 folder. The application compiled as AnyCPU. How can i load needed version of SQLite according to windows platform? ...

Is there an x86(_64) instruction which gives index of the highest (or lowest) '1' bit?

As said. e.g. for the 8-bit(just for example, no byte order considered) integer 00100100, is there an instruction gives 5? Thanks in advance, ...

Can I install both x86/x64 windbg on my x64 WIN7?

I need to analysis some x86 dump file, So I want to install the x86 windbg on my computer. or if I can use the x64 windbg to analysis the x86 dump file? ...

how to debug x86 assembly

Hello guys, I am writing a VMM for intel x86 architecture. Most of the code contains x86 platform specific assembly and c code. Can some one help me how to debug the assembly code please including hardware data structures. ...

How does DTrace pid probes work?

How do DTrace pid probes, specifically entry and return probes, work on assembly level ? My assumption was that upon initialization, DTrace would modify the target code by changing the instruction at the target location to be an interrupt (e.g. 'int 0x1'). Then in the interrupt handler first do the tracing task, then complete the origin...

how to find cpu cache size for a x86 processor

Hi, I want to find cpu cache size of L1 or L2 caches using x86 assembly language. I heard cpuid and MSR registers have system specific data. Can some one help me how can I get sizes please. ...

how does a system ensure coherence between memory and cache

For example if I write to a particular memory location (ex: DMA transfer) how does it get affected in my cache? ...

Is there a limit to how far a JE can jump?

I heard somewhere that conditional jump instructions in the x86 instruction set were limited to 256 bytes. (In other words, the jump could not go further than 256 bytes.) Is this true? I have been writing logic involving JMP instructions to get around this. Is it necessary? ...

imul assembly instruction - one operand?

I am using a run-time debugger. EAX: 0000 0023 EDX: 5555 5556 imul edx EAX: aaaa aac2 EDX: 0000 000b I am utterly confused, and can't figure out how this multiply is working. What's happening here? I notice in a similar question here that imul ebx ; result in EDX:EAX I don't understand the EDX:EAX notation though :/ ...

What does this assembly do?

rep stos dword ptr [edi] ...

What does "DS:[40207A]" mean in assembly?

0040103A CALL DWORD PTR DS:[40207A] USER32.MessageBoxA What does DS: mean? ...

General Purpose Registers - Order

Why are the general purpose registers ordered as they are? (eax, ecx, edx, ecx) For example when regarding the "inc" instruction, the opcodes are: inc eax - 40 inc ecx - 41 inc edx - 42 inc ebx - 43 Is there a reason why they are ordered that way? ...

How did 16-bit C compilers work?

C's memory model, with its use of pointer arithmetic and all, seems to model flat address space. 16-bit computers used segmented memory access. How did 16-bit C compilers deal with this issue and simulate a flat address space from the perspective of the C programmer? For example, roughly what assembly language instructions would the f...