for example I have something like this in my makefile
all:
cd some_directory
but when I type make I saw only 'cd some_directory' like in echo command
for example I have something like this in my makefile
all:
cd some_directory
but when I type make I saw only 'cd some_directory' like in echo command
It is actually executing the command, changing the directory to some_directory
, however, this is performed in a sub-process shell, and doesn't affect neither make nor the shell you're working from.
If you're looking to perform more tasks within some_directory
, you need to add a semi-colon and append the other commands as well. Note that you cannot use newlines as they are interpreted by make as the end of the rule, so any newlines you use for clarity needs to be escaped by a backslash.
For example:
all:
cd some_dir; echo "I'm in some_dir"; \
gcc -Wall -o myTest myTest.c
Note also that the semicolon is necessary between every command even though you add a backslash and a newline. This is due to the fact that the entire string is parsed as a single line by the shell.
A common usage though is to call make in the sub directory, which you might want to look into. There's a command line option for this so you don't have to call cd
yourself, so your rule would look like this
all:
make -C some_dir all
which will change into some_dir
and execute the Makefile
in there with the target "all".
EDIT:
For the record, make always echos the command it executes, which is what you're seeing.
What do you want it to do once it gets there? Each command is executed in a subshell, so the subshell changes directory, but the end result is that the next command is still in the current directory.
With GNU make, you can do something like:
BIN=/bin
foo:
$(shell cd $(BIN); ls)