tags:

views:

98

answers:

2
+2  Q: 

How does a register machine differ from a stack machine?

How does a register machine differ from a stack machine?

+1  A: 

Wikipedia has some good explanation the difference between Stack Machine and Register Machine

Shoban  2010-02-18 12:04:36
Wikipedia lost me at "The register machine gets its name from its one or more "registers" -- in place of a Turing machine's tape and head (or tapes and heads) the model uses multiple, uniquely-addressed registers, each of which holds a single positive integer."
Zubair  2010-02-18 12:07:18
@Zubair You have been provided with explanations - it's not our job to provide you with understanding.
anon  2010-02-18 12:08:48
Sorry, its not your fault, its just that I don't have time for architecture astronauts who wrote the Wikipedia page. Thanks for the link anyway.
Zubair  2010-02-18 15:27:05
+1  A: 

http://stackoverflow.com/questions/179478/learning-resources-stack-machines-jvm-especially
http://stackoverflow.com/questions/1622530/what-exactly-is-a-register-machine
http://stackoverflow.com/questions/164143/registers-vs-stacks

zapping  2010-02-18 12:06:22
Very good links, thanks
Zubair  2010-02-18 12:08:37

related questions

Double(s) across different cpu architectures?
Finding prime factors to large numbers using specially-crafted CPUs
Can you recommend any good book about low level programming?
How does a hardware trap in a three-past-the-end pointer happen even if the pointer is never dereferenced?
Critical sections with multicore processors
Are Harvard architecture computers immune to arbitrary code injection and execution attacks?
What part (specifically) of a native executable makes it non-portable?
Do certain languages have intrinsic processor architectures by-design
What is a CPU thread and how is it related to logical threads in code?
Windows Mobile 6 CPU architectures?
Help me out on SEGMENTS of Instructions( MC68000) programming
Setup targeting both x86 and x64?
L1 memory cache on Intel x86 processors
Are C++ int operations atomic on the mips architecture
Any advantage of one architecture over another for array intensive computing?
Can increment of a register be used to determine the clock rate?
Reading Program Counter directly
How are interrupts handled by dual processor machines?
Would there be any point in designing a CPU that could handle IL directly?
Determine target architecture of binary file in Linux (library or executable)
Detecting CPU architecture (32bit / 64bit ) in scons?
How can I determine for which platform an executable is compiled?
GetNativeSystemInfo and AMD Phenom; incorrect processor type?
On 32-bit CPUs, is an 'integer' type more efficient than a 'short' type?
Which CPU architectures support Compare And Swap (CAS)?