Efficient C code for Hardware realization in Verilog

Question

Hi, I have a plain C code for a Image codec.My goal is to develop a efficient C model which will be taken and realized in Hardware using Verilog or some such Hardware description language. What i am trying to find out is:

1.) What modifications need to be done in exisitng C code structures to make it hardware efficient

2.)Do data structures need to be modified. Are there any constrains related to arrays/buffers(Like they should be declared with storage class register.

3.) I heard that a H/w model should not have if conditions or as minimal as possible. What is that about?

(Consider a generic Hardware realization using some FPGA, Verilog w/o much details about bus, clock etc..)

-AD

Answer 1

1. This depends on how serial or parallel you want go with the hardware implementation of your algorithm.

In an always block there is a difference between "<=" (non-blocking) and "=" blocking assignment. Blocking assignment is like what you have in software, everything is evaluated line-by-line which tends synthesize to lower performance priority-encoded sequencial logic. With non-blocking statement all assignments in the always block get evaluated simulataneously, which tends to make more parallel structures. This will likely be the part you will need to concentrate most on when porting the software to hardware.

1. In RTL-friendly Verilog you have combinational logic (continous assignment of logic equation) and memory assignment (registers and latches) to hold state over time. Your data structures coded as RTL will likely infer registers and latches during logic synthesis. Your data structures will probably work when coded correctly in Verilog, but what makes sense executing on a microprocessor may not be the best way to build it in hardware. Again it depends.

2. "if" can be used for both combinational logic and memory logic (holds state) "if" when written as a ternary operator (Verilog has the same syntax as C for this) synthesizes to a multiplexor (mux). "if" can also be used in the logic description for a register for looking to see if the reset pin was asserted after the always block event list fired (this is just one example). Be careful with "If": when intending to create combinational logic with an always block (event list does not have posedge clk or negedge clk, posedge reset, negedge reset, etc.) and make an assignment to the combinational logic variable as part of an "if" statement, but then forget the "else" statement a latch will be inferred during synthesis. Not having a matching "else" statement for an "if" statement means don't do anything (hold the value).

The "reg" type is used to describe both combinational logic and memory logic; what logic gets synthesized depends on the always block event list and the presence of full case. C code generally translates to the style used in always blocks.

The "wire" type is used for continuous assignment (combinational logic).

ImpulseC is a software-to-hardware compiler that looks intriguing. HDL Coder is a companion product to MATLAB/Simulink to automatically generate your hardware description.

Even if you are using these software tools to create the hardware description for you, you will still want to understand what they generated.