Help with Makefile: No rule to make target

Question

CC = g++
CFLAGS = -Wall

RM = /bin/rm -rf
BIN_DIR = 

ifeq "$(DEBUG)" "1"
BIN_DIR = Debug
else
BIN_DIR = Release
endif

OBJS = \
$(BIN_DIR)/Unit.o

$(BIN_DIR)/%.o: src/%.c
    @echo Building "$@"
    @g++ -c "$<" -o"$@"

all: $(OBJS)
clean:
    $(RM) $(BIN_DIR)

.PHONY: all clean

However, when I try to build my project this, it gives me the error:

make: *** No rule to make target 'Release/Unit.o', needed by 'all'. Stop.

I am new to writing makefiles from scratch and so this might be a stupid question, but any help is appreciated!

Answer 1

The problem is here:

$(BIN_DIR)/%.o: src/%.c
    @echo Building "$@"
    @g++ -c "@<" -o"$@"

I think that's more like this :

$(BIN_DIR)%.o: %.c
    $(CC) -o $@ -c $< $(CFLAGS)

Answer 2

As Sean Bright already pointed out, changing

@g++ -c "@<" -o"$@"

to

@g++ -c "$<" -o"$@"

also makes the Makefile work for me (ming32-make: GNU Make 3.81)

Since you had the Makefile on the same level as the source file (inside the src directory), your rule were failing.