My first question (yay!) is about gnumake and parallel builds. Here's a quick example file: .PHONY: tool_1 tool_2 tool_3 tool_4 all tools all: | tools tools: | tool_2 tool_3 tool_4 tool_1: # commands for tool 1 tool_2: | tool_1 # commands for tool 2 tool_3: | tool_1 # commands for tool 3 tool_4: | tool_1 # command...
I know the perl one liner below is very simple, works and does a global substitution, A for a; but how do I run it in a makefile? perl -pi -e "s/a/A/g" filename I have tried (I now think the rest of the post is junk as the shell command does a command line expansion - NOT WHAT I WANT!) The question above still stands! APP = $(shell p...
target: dependencies command1 command2 On my system (Mac OS X), make seems to require that that Makefiles have a tab character preceding the the content of each command line, or it throws a syntax error. This is an annoyance when creating or editing Makefiles because I have my editor set up to be all-spaces-all-the-time. Can ...
I am tryng to create a shared library which internally is linking to many shared lib and a static lib . In my case my shared lib is not including static lib . I want to know what i am trying whether it is correct or i need to convert static lib to shared lib and then do the linking . I need to know that is there any makefile flag whic...
Hi, In my c/c++ files, there are multiple #define. As an example: #ifdef LIBVNCSERVER_HAVE_LIBZ /* some code */ #ifdef LIBVNCSERVER_HAVE_LIBJPEG /* some more code */ Can you please tell me how can I modify my Makefile.in so that I have those #define in ALL files during compilation? Thank you. ...
What does .PHONY mean in a Makefile? I have gone through this, but it is too complicated. Can somebody explain it to me in simple terms? ...
I have a GNU Makefile that looks a bit like this: LIST = item1 .PHONY: targetMain targetA targetB preA preB targetMain: # DO all the work in here echo $(LIST) targetA: preA targetMain targetB: preB targetMain preA: LIST += itemA preB: LIST += itemB The idea is that I either run make targetA or make targetB. Both of them do a ...
Hi, I want to change a macro value defined inside macro.mk from my Makefile based on some target. I am using clearmake as my build system. e.g. I have a macro MYMACRO defined inside macro.mk. Now, what I need is that following command clearmake target1 this should set macro MYMACRO to CPPFLAGS_TARGET1 and clearmake ...
I've posted the relevant bits of my makefile. When I run make all on this makefile, there's a compilation error when compiling debugosd.o. However, because make found a previously built debugosd.o, it just continues on to build dialup.otz. Without deleting all the .o's, how can I force debugosd.o to become out-of-date - and so force ma...
How do I prevent Code Composer 4 (which is based on Eclipse) from generating its own makefile and use the one I provide instead? Background: I am starting a FreeRTOS project on a MSP430F5436 using Code Composer 4 and have a demo app with a supplied make file) Thanks! ...
I have the simplest of makefiles: threads: gcc threads.c -o threads but I get the error: 'make: Fatal error: Don't know how to make target' Any ideas what I am doing wrong? It's probably something simple - I made the makefile in emacs on the system which is trying to run it (Unix) ...
I'm learning about the autotools and made it through a hello world scenario and now wanted to try wrapping up some cppunit tests into a package and build it using the autotools. In order to build the package, cppunit would have to be installed on the system. What's the best way to check for this during the ./configure portion of the bu...
Is there a standalone tool, that can be ran from a shell script, to generate a makefile from the .cproject? Actually, the same functionality as the CDT itself, but that can be non-interactive. As is probably obvious, I want to be able to run a script that checkouts and builds the software, comprising from several C++ project. I am tryin...
Hey all, What I want to achieve: I'm porting an application to iPhone and I need to run some scripts on the generated assembly by the compiler (our optimization stuff) and then compile it to an executable. I always used a standard make file and did something like this gcc -S -c my_source.c # compile and generate ASM optimize.sh my_sour...
I downloaded someone's source code for a program and i needed to make some changes. Now i want to compile it but it doesn't seem to work. PROGS = isotociso COMMON = tools.o bn.o ec.o wiidisc.o rijndael.o DEFINES = -DLARGE_FILES -D_FILE_OFFSET_BITS=64 LIBS = C:/Dev-Cpp/lib/libwsock32.a C:/Dev-Cpp/lib/libcrypto.a C:/Dev-Cpp/lib/libcomdl...
I'm using GNU make, and including a 3rd party library in a project that has a build system that goes berserk if CFLAGS is defined in the environment when it is called. I like to have CFLAGS defined in my environment for other reasons. The library's build is being invoked from another makefile, so that I say e.g.: 3rdparty: $(MAKE)...
Is there a way to direct make/gmake to act upon conditional dependencies? I have this rule in place: $(OBJ_DIR)/%.o: $(SRC_DIR)/%.cpp $(CPPC) -c $(FLAGS_DEV) $< -o $@ In the general case, every .cpp file has a corresponding .h file; however there are a few exceptions. Is there a way to achieve "depend on this if it exists" with gm...
I'm getting some unexpected results calling one makefile from another. I have two makefiles, one called /path/to/project/makefile and one called /path/to/project/gtest-1.4.0/make/Makefile. I'm attempting to have the former call the latter. In /path/to/project/makefile, I have dev: $(OBJ_FILES) $(CPPC) $(LIBS) $(FLAGS_DEV) $(OBJ_FIL...
I have the following makefile (fragment) SRC_DIR = src OBJ_DIR = obj DEP_DIR = dep BIN_DIR = . SRC_FILES := $(wildcard $(SRC_DIR)/*.cpp) OBJ_FILES := $(patsubst $(SRC_DIR)/%.cpp,$(OBJ_DIR)/%.o,$(SRC_FILES)) DEP_FILES := $(patsubst $(SRC_DIR)/%.cpp,$(DEP_DIR)/%.d,$(SRC_FILES)) # Development build directive dev: $(DEP_...
Hi, If i have a VS.NET 2008 solution , and i want to export the build script so that i can use it to build the same application in another environment which does not have VS.NET, how can i extract this make or build script from the VS.NET ? Thanks. ...