cpu-architecture

What is the difference between short adressing mode and long addressing mode

hi, While going through some data sheets of a processor architecture , i saw the terms, short addressing mode and long addressing mode Can anybody give me the general idea of the terms(not needed to be processor specific!) /renjith_g ...

What is mean by epilog and prolog?

hi , While reading some calling convention in some CPU architecture i read something like "epilog and prolog" , when a function is called from another function. Can anybody give more inputs on this? /renjith_g ...

Mutex on 1 byte shared resource

Is Mutex required on 1 byte shared resource? If not then why not? Consider I am using normal desktop PC pentium IV , 32 bit. Will condition change if use core 2 duo? ...

Difference between physical addressing and virtual addressing concept.

hi, This is re submission , because am not getting any response from superuser.com Also sorry for the mis understanding. First of all I need to know , difference between physical addressing and virtual addressing concept in an embedded systems? then why virtual addressing concept is implemented in an embedded systems ? then what is t...

Does developing applications for SPARC, IBM power CPU require separate compliers, other than x86, x86-64 targets?

Does developing applications for SPARC, IBM PowerPC require separate compliers, other than x86 and x86-64 targets? If true, how easliy could x86, x64 binaries in Linux be ported to SPARC and PowerPC? Is there a way to simulate these environments using virtualization? ...

Determining the CPU architecture of a static library (LIB) on Windows

I just built libpng on a 64-bit Windows machine using VS2008. It produces a libpng.lib file inside the \projects\visualc71\Win32_Lib_Release directory (Configuration used being "LIB Release"). I used dumpbin to inspect this LIB file: C:\Temp\libpng-1.4.3>dumpbin projects\visualc71\Win32_LIB_Release\libpng.lib Microsoft (R) COFF/PE Dum...

Why "netbook OSs" just run on netbooks?

What are the differences between a Netbook and Notebook? İs it CPU architecture? What are differences between a netbook CPU architecture and notebook CPU architecture? ...

Why are CPU registers fast to access?

Register variables are a well-known way to get fast access (register int i). But why are registers on the top of hierarchy (registers, cache, main memory, secondary memory)? What are all the things that make accessing registers so fast? ...

Best way to assert compatible architecture when reading and writing a file?

I have a program that reads and writes a binary file. A file is interchangeable between executions of the program on the same platform, but a file produced on one machine may not be valid on another platform due to the sizes of types, endian-ness etc. I want a quick way to be able to assert that a given file is valid for reading on a g...

What are the benefits of stacked/on chip memory?

I am trying to find some reference materials to write up something about stacked memory's future. I take this to mean memory that is stacked on the processing chip that allows to faster access time, less latency, etc. Is this a technology that is likely to be adopted by major manufacturers, and is it worth keeping tabs on as a "future t...

How does an assembly instruction turn into voltage changes on the CPU?

I've been working in C and CPython for the past 3 - 5 years. Consider that my base of knowledge here. If I were to use an assembly instruction such as MOV AL, 61h to a processor that supported it, what exactly is inside the processor that interprets this code and dispatches it as voltage signals? How would such a simple instruction like...

Running mlutiple threads in CPU

Hi, All we know that JVM schedules the user threads in a single CPU based machine .Why cant a single CP run mltiple process/threads in parallel,What is the constrain stops that capability Also JVM is like a another software which is running in any machine,There may be thousands of other programs may waiting for the CPU cycle at a given...

How is CPU usage calculated?

I hope this is the right place to ask this question, as I think it is related to algorithms and performance. On my desktop, I have a little widget that tells me my current CPU usage. It also shows the usage for each of my two cores. I always wondered, how does the CPU calculate how much of its processing power is being used? Also, if ...

Whats the difference between armv6 and i386?

I am trying to link libssh2.dylib (a 3rd party library compiled by Matthew Wilkinson using libssh2 library from http://www.libssh2.org) to my xcode project but when I try the following code: const char * libssh2_version(int required_version); printf("libssh2 version: %s", libssh2_version(0) ); Heres the error I get: ld: warning: in...

what is difference between 32 bit vs 64 bit OSs and processors (intel arch and WIndows)

hi, I just know the only differences I know is that size of the registers for 64 bit arch is 64 bits and for 32 bit arch is 32 bits. Also the addresses are 64 bits in 64 bit processors. Any other differences ? ...

Architecture targeting on IA-32

I've noticed that many Intel 32-bit programs have an i386 target, yet some have i486, i586 or i686 as their build architecture. Are there any new features or instructions added to the instruction set in the latter three processor architectures? ...

How to use proper unmanged .dll depending on CPU Architecture?

I am using an unmanaged library in a .net application which is used on x86 and 64bit systems alike and therefore is compiled as 'Any CPU'. The unmanaged, native .dll however comes in two different .dlls for that (one for win32 and one for x64). Is there any way to still keep the 'Any CPU' / one binary way with different native .dlls reg...

64 bit Operating System ?

Hi, What we are getting if someone says "my machine is 64-bit computer" . What is the difference between 64-bit computer(I mean the CPU architecture) and operating system(WINDOWS 64 bit OS). Please explain me how these terms are related with processor architecture Thx ...

Why misaligned address access incur 2 or more accesses?

The normal answers to why data alignment is to access more efficiently and to simplify the design of CPU. A relevant question and its answers is here. And another source is here. But they both do not resolve my question. Suppose a CPU has a access granularity of 4 bytes. That means the CPU reads 4 bytes at a time. The material I li...

Xcode Only Gives Me Desktop Architectures for iOS App

I have an iOS project that I've put in Dropbox to work with a few friends. The issue is that it seems to get "corrupted", so that after some time (after someone else has accessed the Xcode project file), when I try to go and open it again I get a Base SDK Missing error. In the Project Settings, I discover that I'm missing the valid ARM6/...