make

makefiles - compile all c files at once

I want to experiment with GCC whole program optimizations. To do so I have to pass all C-files at once to the compiler frontend. However, I use makefiles to automate my build process, and I'm not an expert when it comes to makefile magic. How should I modify the makefile if I want to compile (maybe even link) using just one call to GCC?...

Modern equivalent of javadeps?

I am looking for a replacement for javadeps, which I used to use to generate sections of a Makefile to specify which classes depended on which source files. Unfortunately javadeps itself has not been updated in a while, and cannot parse generic types or static imports. The closest thing I've found so far is Dependency Finder. It almos...

Good way to do a "switch" in a Makefile

I'm experimenting with an updated build system at work; currently, I'm trying to find a good way to set compiler & flags depending on the target platform. What I would like to do is something like switch $(PLATFORM)_$(BUILD_TYPE) case "Linux_x86_release" CFLAGS = -O3 case "Linux_x86_debug" CFLAGS = -O0 -g case "ARM_rel...

Make: $(wildcard) holding a directory open

So there seems to be this problem with GNU Make's $(wildcard) function keeping a directory open on Windows. See (unasnwered) post "make is holding a directory open". Google does not provide much information on the topic. In short: the Makefile uses the $(wildcard) function at some point, and keeps a directory open, which typically preve...

gcc error: wrong ELF class: ELFCLASS64

I was trying to compile a program using an external compiled object coreset.o. I wrote the public01.c test file and my functions are in computation.c, both of which compiles. However its failing on linking it together. What might be the problem? gcc -o public01.x public01.o computation.o coreset.o ld: fatal: file coreset.o: wrong ELF...

No rule to make target consoleio.c

In a recent issue, I've found that DJGPP can only accept the DOS command line character limit. To work around this limitation, I've decided to try to write a makefile to allow me to pass longer strings. In the process of hacking together a makefile and testing it, I've come across a strange error. The makefile is as follows: AS := n...

Getting Quiet Make to echo command lines on error

I have a Makefile building many C files with long long command lines and we've cleaned up the output by having rules such as: .c${MT}.doj: @echo "Compiling $<";\ $(COMPILER) $(COPTS) -c -o $@ $< Now this is great as the @ suppresses the compilation line being emitted. But when we get an error, all we get is the error message, no c...

How to make a failing $(shell) command interrupt Make

I have a Makefile that starts by running a tool before applying the build rules (which this tool writes for me). If this tool, which is a python script, exits with a non-null status code, I want GNU Make to stop right there and not go on with building the program. Currently, I do something like this (top level, i.e. column 1): $(info G...

How to generate a Makefile with source in sub-directories using just one makefile.

I have source in a bunch of subdirectories like: src/widgets/apple.cpp src/widgets/knob.cpp src/tests/blend.cpp src/ui/flash.cpp In the root of the project I want to generate a single Makefile using a rule like: %.o: %.cpp $(CC) -c $< build/test.exe: build/widgets/apple.o build/widgets/knob.o build/tests/blend.o src/ui/flash.o ...

Need a makefile dependency rule that can handle missing files

We use GNU Make for our system. At the end of our makefiles, we have an include called Makedepends which generates a bunch of .d files using -MM switch on gcc. We then include the .d file for each .cc file using an include $(CXXFILES:.cc=.d) line. But when we delete file or move files, the dependancies step breaks and we have to manua...

Dependency checking - how to clean up a project with bad makefiles

I have a very large C project with many separate C files and headers and many dozens of contributors. Many contributors do not have a strong knowledge of makefiles and dependencies, resulting in the not uncommon problem where you almost always have to "make clean" before you can trust "make" to have produced correct output. If make too...

What's the best way of executing tasks in parallel in Ksh and Perl?

I have this large C++ project that I need to build on a platform that does not have a parallel make (like make -j on Linux). The server has 6 CPU's and I want to do a parallel build manually. I can generate a task list like this for about 300 object files. I use the Makefile for the dependency checks and incremental build: make -f Mak...

Top-level .mak file for Visual Studio?

I've inherited a body of Visual C++ source that consists of about a dozen sub-projects. One of these is an empty "MakeAll" project that depends on all the others, so I can build the entire project by setting the MakeAll project active and selecting "Build All." I'd like to automate this process, and coming from a linux environment, my ...

minimum c++ make file for linux

I've looking to find a simple recommended "minimal" c++ makefile for linux which will use g++ to compile and link a single file and h file. Ideally the make file will not even have the physical file names in it and only have a .cpp to .o transform. What is the best way to generate such a makefile without diving into the horrors of autoco...

generic makefile?

Is there a generic makefile i can use to build a simple c++ project? on windows? i modified a working wii makefile to win32 but could not build properly (difference in make? the make app and the makefile seem to be found). I did a little hack and made a copy of mingw32-make as make. -edit- export PATH seem to be the reason i got my old ...

makefile calling makefile error

I have a working make, I have platform code and like several makes for each os in the folder. Right now I have one makefile which works. I renamed it to Makefile.ws and wrote this in Makefile all: make -f Makefile.w32 clean: make -f Makefile.w32 clean I ran it and got this error > "make" make -f Makefile.w32 make[1]: Enteri...

Is there a way to create a Makefile without running ./configure ??

I'd like to skip the tests and create a (default) Makefile. ...

Can this build system be sped up?

Our build is dog slow. It uses nested gnu makefiles on linux. It creates three builds for three different targets from the same source tree. It uses symlinks to point to each of the three parallel directory trees in turn. We can do partial builds by using make inside subdirectories, which saves time, but if our work spans multiple direct...

Recursive Make - friend or foe?

I'm using (GNU) Make in my project. I'm currently putting one makefile per directory and specify the subdirectories using SUBDIRS. It's been suggested to me that this is not the ideal way of using make, that using a one toplevel make file (or several, split up using include). I've tried migrating/using this layout in the past, but it app...

Make / Build problem....

I have a library consisting of approx 100 source files. I want one of the sources to be always rebuilt if any of the other files have been compiled but I dont want it built every time I run the make/build. Basically I want this file to have the last build date/time built into it so any application linking to the library can check the la...