make

Problem with "make & make install" software on linux

I have worked on Linux for a year. One thing bothers me is that I am not familar with the process of installing new software with source code(I can't install them from netword due to environment limitations). I was often blocked with different kinds of error, for example: ------------------------ libtool: install: error: relink `Magick...

EDE subproject confusion

I've been trying to get subprojects in EDE to work, but I don't understand much and I can't find any good documentation. What would the project configurations have to look like for the following tree: Test Project.el bin test src Project.el main.cpp class.cpp inc Project.el class.h ...

gnu make: match-anything: dependance on existance of prerequisites

Dear gurus, Please consider the following Makefile: CC = g++ CFLAGS = -c -O -Wall EFLAGS = -O -Wall -lm -o UTILITIES = error.o stream_manip.o mat_ops.o GaussElim.o UTILITIES += abstractmatrix.o dvector.o dmatrix.o ConjGrad.o # All objects %.o: %.cpp %.hpp $(CC) $(CFLAGS) $< # Executables (doesn't have extension) % : %.cpp $(...

gnu make: How to concat two strings

Given the line: program_OBJS := ${program_SRCS:.cpp=.o} I would like to append .o to each filename instead of replacing .cpp with .o. How do I do that? ...

Forcing GNU make to execute specific target

Hello, I'm trying to execute a single target calling "make cleanlists". This target has no prerequisites and should be executed (in my understanding) immediately without touching other rules. .PHONY: cleanlists cleanlists: @echo cleaning source and header lists .. @rm -f sourcelist.mk @rm -f headerlist.mk @echo done. ...

"cannot find -lreadline" error when compiling Lua

This should be a pretty straightforward issue -- I'm trying to compile Lua (or rather lua-vec, which is a minor variant) on a CentOS Linux install, and I get the following error: [jt@flyboy src]#make linux make all MYCFLAGS=-DLUA_USE_LINUX MYLIBS="-Wl,-E -ldl -lreadline -lhistory -lncurses" make[1]: Entering directory `/jt/flyboy/fly/lu...

How to instruct Makefile to use different compilers

I have build my code for two different platforms at once using two different compilers and libraries. How can I do this with single make file. Currently my makefile contents are given below. How can instruct it to change the compiler to gcc with in the same make file VPATH = /root/Documents/project/src CROSS_COMPILE = /opt/compilers...

When declaring the pattern rule as PHONY, it is not triggered

I have the following recursive makefile: .PHONY: all clean %.subdir: $(MAKE) -C src $* $(MAKE) -C dict $* all: all.subdir clean: clean.subdir and it works fine: $ make all make -C src all make[1]: Entering directory `/or-1.3.6-fix/src' make[1]: Nothing to be done for `all'. make[1]: Leaving directory `/or-1.3.6-fix/src' ma...

Makefile expanding variables

I would like to perform expansion on a variable that might contain references to other variables. I'll illustrate with an example: a = 1 b = 2 c = 3 X = foo bar baz $(foreach x, a b c, $$(value $(x))) qux $(info $(X)) If you run this makefile, it prints: foo bar baz $(value a) $(value b) $(value c) qux I'd like to know how to expand ...

How to copy a directory in a Makefile?

I have a directory images/ that I want to copy to build/images/ from within a Makefile. The directory might contain multiple levels of subdirectories. What would be the most elegant way to do that? I want: avoid a full directory copy on each make run (i.e. no cp -r) guaranteed consistency (i.e. if a file changed in images/ it should be...

Overriding submake assigned variables in a parent makefile

I'm using Make and I have a makefile which sets a variable with a value that I need to override from a parent makefile. I've tried setting the variable in the parent makefile and using export to pass it to the submake but the variable is not using the passed down value, instead it is using the value explicitly set in the sub-Makefile. ...

Default compiler flags with Autotools

I want to know how to set default compiler/linker/etc. flags if I use Autoconf/Automake combo. For example, the default compiler flag is "-O2 -g" if I don't set anything. I can just override it with something else, for example if I want to debug: ./configure 'CXXFLAGS=-O0 -g' But I find the default configuration stupid because if I e...

Makefile: Efficient way to make all '.c' files depend on a header file with the same name?

I have a directory with 50 .c source files and each one of these .c files depends on a .h file with the same name plus a common header file. Example: foo.c depends on foo.h and common.h bar.c depends on bar.h and common.h baz.c depends on baz.h and common.h Is it possible to setup this dependency without having to make a separate tar...

How to ignore mv error?

Hi, I'm making a Makefile that moves an output file (foo.o) to a different directory (baz). The output file moves as desired to the directory. However since make won't recompile the output file if I type 'make' again, mv gets an error when it tries to move the non-existent empty file to the directory baz. So this is what I have defined...

How to ensure object files are compiled with correct settings in Makefile with multiple MAKE targets

I have a small project that builds a number of targets from the same source files. The targets require building the source files with different compile flags. This is actually on cygwin so I'll use that as the concrete example although I suppose this is a generic problem. So this would be an example Makefile: a: CFLAGS = a: a.o c.o b...

make: Why don't environment variables override variables set in makefiles by default?

Hi all, I am compiling packages and I see that oftentimes Makefile authors write set CFLAGS in the makefile, with such and such options. I, on the other hand, would like to try out some compiler optimizations and would like to propagate the compiler switches to make with as little trouble as possible. Not always is this doable though. F...

Doing a make over TRAMP

I am using Emacs Tramp for remote development. I think something must be wrong. I had some serious issues with speed when I used ssh:, so I switched to scp:. It seems to work much faster. I tried to run M-x compile with make and it seems to act differently than if I run make directly from a shell prompt. Namely, it is unable to find...

Iterating over an empty item with GNU make's $(foreach)

I just discovered GNU make's $(foreach) function, and I'm following the foreach-eval-call pattern used in the documentation; for instance, graphviz_progs := dot neato circo fdp define LAYOUT_template %-$(1).dot: %.dot $(1) -Tdot $$? > $$@ endef $(foreach p, $(graphviz_progs), \ $(eval $(call LAYOUT_template,$(p))) \ ) This works...

Does "make" know how to search sub-dirs for include files?

Hello This is a question for experienced C/C++ developpers. I have zero knowledge of compiling C programs with "make", and need to modify an existing application, ie. change its "config" and "makefile" files. The .h files that the application needs are not located in a single-level directory, but rather, they are spread in multiple su...

Android build failure

I followed instructions from here. After $ repo sync I tried to build it with $ make, but got this error: host SharedLib: libneo_cgi (out/host/linux-x86/obj/lib/libneo_cgi.so) /usr/bin/ld: skipping incompatible /usr/lib/gcc/i486-linux-gnu/4.4.3/../../../libz.so when searching for -lz /usr/bin/ld: skipping incompatible /usr/lib/gcc/i48...